#include "pcnt.h"
#include "arm_features.h"
-void do_memhandler_pre();
-void do_memhandler_post();
-
/* Linker */
static void set_jump_target(void *addr, void *target)
{
}
// Alloc cycle count into dedicated register
-static void alloc_cc(struct regstat *cur,int i)
+static void alloc_cc(struct regstat *cur, int i)
{
- alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
+ alloc_arm_reg(cur, i, CCREG, HOST_CCREG);
+}
+
+static void alloc_cc_optional(struct regstat *cur, int i)
+{
+ if (cur->regmap[HOST_CCREG] < 0) {
+ alloc_arm_reg(cur, i, CCREG, HOST_CCREG);
+ cur->noevict &= ~(1u << HOST_CCREG);
+ }
}
/* Special alloc */
//case HIREG: addr = &hi; break;
//case LOREG: addr = &lo; break;
case CCREG: addr = &cycle_count; break;
- case CSREG: addr = &psxRegs.CP0.n.SR; break;
case INVCP: addr = &invc_ptr; is64 = 1; break;
case ROREG: addr = &ram_offset; is64 = 1; break;
default:
int i = stubs[n].a;
int rs = stubs[n].b;
const struct regstat *i_regs = (void *)stubs[n].c;
+ int adj = (int)stubs[n].d;
u_int reglist = stubs[n].e;
const signed char *i_regmap = i_regs->regmap;
int rt;
handler=jump_handler_read32;
assert(handler);
pass_args64(rs,temp2);
- int cc=get_reg(i_regmap,CCREG);
- if(cc<0)
- emit_loadreg(CCREG,2);
- emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
+ int cc, cc_use;
+ cc = cc_use = get_reg(i_regmap, CCREG);
+ if (cc < 0)
+ emit_loadreg(CCREG, (cc_use = 2));
+ emit_addimm(cc_use, adj, 2);
+
emit_far_call(handler);
- // (no cycle reload after read)
+
+#if 0
+ // cycle reload for read32 only (value in w2 both in and out)
+ if (type == LOADW_STUB) {
+ emit_addimm(2, -adj, cc_use);
+ if (cc < 0)
+ emit_storereg(CCREG, cc_use);
+ }
+#endif
if(dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
loadstore_extend(type,0,rt);
}
static void inline_readstub(enum stub_type type, int i, u_int addr,
const signed char regmap[], int target, int adj, u_int reglist)
{
- int rs=get_reg(regmap,target);
- int rt=get_reg(regmap,target);
- if(rs<0) rs=get_reg_temp(regmap);
- assert(rs>=0);
+ int ra = cinfo[i].addr;
+ int rt = get_reg(regmap, target);
+ assert(ra >= 0);
u_int is_dynamic=0;
uintptr_t host_addr = 0;
void *handler;
- int cc=get_reg(regmap,CCREG);
- //if(pcsx_direct_read(type,addr,adj,cc,target?rs:-1,rt))
+ int cc, cc_use;
+ cc = cc_use = get_reg(regmap, CCREG);
+ //if(pcsx_direct_read(type,addr,adj,cc,target?ra:-1,rt))
// return;
handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr);
if (handler == NULL) {
if(rt<0||dops[i].rt1==0)
return;
if (addr != host_addr)
- emit_movimm_from64(addr, rs, host_addr, rs);
+ emit_movimm_from64(addr, ra, host_addr, ra);
switch(type) {
- case LOADB_STUB: emit_movsbl_indexed(0,rs,rt); break;
- case LOADBU_STUB: emit_movzbl_indexed(0,rs,rt); break;
- case LOADH_STUB: emit_movswl_indexed(0,rs,rt); break;
- case LOADHU_STUB: emit_movzwl_indexed(0,rs,rt); break;
- case LOADW_STUB: emit_readword_indexed(0,rs,rt); break;
+ case LOADB_STUB: emit_movsbl_indexed(0,ra,rt); break;
+ case LOADBU_STUB: emit_movzbl_indexed(0,ra,rt); break;
+ case LOADH_STUB: emit_movswl_indexed(0,ra,rt); break;
+ case LOADHU_STUB: emit_movzwl_indexed(0,ra,rt); break;
+ case LOADW_STUB: emit_readword_indexed(0,ra,rt); break;
default: assert(0);
}
return;
save_regs(reglist);
if(target==0)
emit_movimm(addr,0);
- else if(rs!=0)
- emit_mov(rs,0);
- if(cc<0)
- emit_loadreg(CCREG,2);
- emit_addimm(cc<0?2:cc,adj,2);
+ else if(ra!=0)
+ emit_mov(ra,0);
+ if (cc < 0)
+ emit_loadreg(CCREG, (cc_use = 2));
+ emit_addimm(cc_use, adj, 2);
if(is_dynamic) {
uintptr_t l1 = ((uintptr_t *)mem_rtab)[addr>>12] << 1;
intptr_t offset = (l1 & ~0xfffl) - ((intptr_t)out & ~0xfffl);
emit_far_call(handler);
- // (no cycle reload after read)
+#if 0
+ // cycle reload for read32 only (value in w2 both in and out)
+ if (type == LOADW_STUB) {
+ if (!is_dynamic)
+ emit_far_call(do_memhandler_post);
+ emit_addimm(2, -adj, cc_use);
+ if (cc < 0)
+ emit_storereg(CCREG, cc_use);
+ }
+#endif
if(rt>=0&&dops[i].rt1!=0)
loadstore_extend(type, 0, rt);
restore_regs(reglist);
int i=stubs[n].a;
int rs=stubs[n].b;
struct regstat *i_regs=(struct regstat *)stubs[n].c;
+ int adj = (int)stubs[n].d;
u_int reglist=stubs[n].e;
signed char *i_regmap=i_regs->regmap;
int rt,r;
emit_mov64(temp2,3);
host_tempreg_release();
}
- int cc=get_reg(i_regmap,CCREG);
- if(cc<0)
- emit_loadreg(CCREG,2);
- emit_addimm(cc<0?2:cc,(int)stubs[n].d,2);
- // returns new cycle_count
+ int cc, cc_use;
+ cc = cc_use = get_reg(i_regmap, CCREG);
+ if (cc < 0)
+ emit_loadreg(CCREG, (cc_use = 2));
+ emit_addimm(cc_use, adj, 2);
+
emit_far_call(handler);
- emit_addimm(0,-(int)stubs[n].d,cc<0?2:cc);
- if(cc<0)
- emit_storereg(CCREG,2);
- if(restore_jump)
+
+ // new cycle_count returned in x2
+ emit_addimm(2, -adj, cc_use);
+ if (cc < 0)
+ emit_storereg(CCREG, cc_use);
+ if (restore_jump)
set_jump_target(restore_jump, out);
restore_regs(reglist);
emit_jmp(stubs[n].retaddr);
static void inline_writestub(enum stub_type type, int i, u_int addr,
const signed char regmap[], int target, int adj, u_int reglist)
{
- int rs = get_reg_temp(regmap);
+ int ra = cinfo[i].addr;
int rt = get_reg(regmap,target);
- assert(rs >= 0);
+ assert(ra >= 0);
assert(rt >= 0);
uintptr_t host_addr = 0;
void *handler = get_direct_memhandler(mem_wtab, addr, type, &host_addr);
if (handler == NULL) {
if (addr != host_addr)
- emit_movimm_from64(addr, rs, host_addr, rs);
+ emit_movimm_from64(addr, ra, host_addr, ra);
switch (type) {
- case STOREB_STUB: emit_writebyte_indexed(rt, 0, rs); break;
- case STOREH_STUB: emit_writehword_indexed(rt, 0, rs); break;
- case STOREW_STUB: emit_writeword_indexed(rt, 0, rs); break;
+ case STOREB_STUB: emit_writebyte_indexed(rt, 0, ra); break;
+ case STOREH_STUB: emit_writehword_indexed(rt, 0, ra); break;
+ case STOREW_STUB: emit_writeword_indexed(rt, 0, ra); break;
default: assert(0);
}
return;
// call a memhandler
save_regs(reglist);
- emit_writeword(rs, &address); // some handlers still need it
+ emit_writeword(ra, &address); // some handlers still need it
loadstore_extend(type, rt, 0);
int cc, cc_use;
cc = cc_use = get_reg(regmap, CCREG);
emit_far_call(do_memhandler_pre);
emit_far_call(handler);
emit_far_call(do_memhandler_post);
- emit_addimm(0, -adj, cc_use);
+ emit_addimm(2, -adj, cc_use);
if (cc < 0)
emit_storereg(CCREG, cc_use);
restore_regs(reglist);
}
#define multdiv_assemble multdiv_assemble_arm64
+// wb_dirtys making use of stp when possible
+static void wb_dirtys(const signed char i_regmap[], u_int i_dirty)
+{
+ signed char mregs[34+1];
+ int r, hr;
+ memset(mregs, -1, sizeof(mregs));
+ for (hr = 0; hr < HOST_REGS; hr++) {
+ r = i_regmap[hr];
+ if (hr == EXCLUDE_REG || r <= 0 || r == CCREG)
+ continue;
+ if (!((i_dirty >> hr) & 1))
+ continue;
+ assert(r < 34u);
+ mregs[r] = hr;
+ }
+ for (r = 1; r < 34; r++) {
+ if (mregs[r] < 0)
+ continue;
+ if (mregs[r+1] >= 0) {
+ uintptr_t offset = (u_char *)&psxRegs.GPR.r[r] - (u_char *)&dynarec_local;
+ emit_ldstp(1, 0, mregs[r], mregs[r+1], FP, offset);
+ r++;
+ }
+ else
+ emit_storereg(r, mregs[r]);
+ }
+}
+#define wb_dirtys wb_dirtys
+
+static void load_all_regs(const signed char i_regmap[])
+{
+ signed char mregs[34+1];
+ int r, hr;
+ memset(mregs, -1, sizeof(mregs));
+ for (hr = 0; hr < HOST_REGS; hr++) {
+ r = i_regmap[hr];
+ if (hr == EXCLUDE_REG || r < 0 || r == CCREG)
+ continue;
+ if ((u_int)r < 34u)
+ mregs[r] = hr;
+ else if (r < TEMPREG)
+ emit_loadreg(r, hr);
+ }
+ if (mregs[0] >= 0)
+ emit_zeroreg(mregs[0]); // we could use arm64's ZR instead of reg alloc
+ for (r = 1; r < 34; r++) {
+ if (mregs[r] < 0)
+ continue;
+ if (mregs[r+1] >= 0) {
+ uintptr_t offset = (u_char *)&psxRegs.GPR.r[r] - (u_char *)&dynarec_local;
+ emit_ldstp(0, 0, mregs[r], mregs[r+1], FP, offset);
+ r++;
+ }
+ else
+ emit_loadreg(r, mregs[r]);
+ }
+}
+#define load_all_regs load_all_regs
+
static void do_jump_vaddr(u_int rs)
{
if (rs != 0)
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