#ifdef __MACH__
#define dynarec_local ESYM(dynarec_local)
-#define add_link ESYM(add_link)
+#define add_jump_out ESYM(add_jump_out)
#define new_recompile_block ESYM(new_recompile_block)
#define get_addr ESYM(get_addr)
#define get_addr_ht ESYM(get_addr_ht)
DRC_VAR(zeromem_ptr, 4)
DRC_VAR(invc_ptr, 4)
DRC_VAR(scratch_buf_ptr, 4)
-@DRC_VAR(align1, 8) /* unused/alignment */
+DRC_VAR(ram_offset, 4)
DRC_VAR(mini_ht, 256)
DRC_VAR(restore_candidate, 512)
orrcs r2, r6, #2048
ldr r5, [r3, r2, lsl #2]
lsl r12, r12, #8
- add r6, r1, r12, asr #6
+ add r6, r1, r12, asr #6 /* old target */
mov r8, #0
/* jump_in lookup */
1:
mov r5, r1
mov r1, r6
- bl add_link
+ bl add_jump_out
sub r2, r8, r5
and r1, r7, #0xff000000
lsl r2, r2, #6
pcsx_read_mem ldrcc, 2
+.macro memhandler_post
+ ldr r0, [fp, #LO_next_interupt]
+ ldr r2, [fp, #LO_cycle] @ memhandlers can modify cc, like dma
+ str r0, [fp, #LO_last_count]
+ sub r0, r2, r0
+.endm
+
.macro pcsx_write_mem wrtop tab_shift
/* r0 = address, r1 = data, r2 = cycles, r3 = handler_tab */
lsl r12,r0, #20
ldr r3, [r3, r12, lsl #2]
str r0, [fp, #LO_address] @ some handlers still need it..
lsls r3, #1
- mov r0, r2 @ cycle return in case of direct store
+ mov r0, r2 @ cycle return in case of direct store
.if \tab_shift == 1
lsl r12, #1
\wrtop r1, [r3, r12]
ldr r12, [fp, #LO_last_count]
mov r0, r1
add r2, r2, r12
- push {r2, lr}
str r2, [fp, #LO_cycle]
+
+ str lr, [fp, #LO_saved_lr]
blx r3
+ ldr lr, [fp, #LO_saved_lr]
- ldr r0, [fp, #LO_next_interupt]
- pop {r2, lr}
- str r0, [fp, #LO_last_count]
- sub r0, r2, r0
+ memhandler_post
bx lr
.endm
str r0, [fp, #LO_address] @ some handlers still need it..
add r2, r2, r12
mov r0, r1
- push {r2, lr}
str r2, [fp, #LO_cycle]
+
+ str lr, [fp, #LO_saved_lr]
blx r3
+ ldr lr, [fp, #LO_saved_lr]
- ldr r0, [fp, #LO_next_interupt]
- pop {r2, lr}
- str r0, [fp, #LO_last_count]
- sub r0, r2, r0
+ memhandler_post
bx lr
FUNCTION(jump_handle_swl):