partially revert c4052f4d79cf

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / new_dynarec.c

diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c
index 8d1e53a..65c8f03 100644 (file)
--- a/libpcsxcore/new_dynarec/new_dynarec.c
+++ b/libpcsxcore/new_dynarec/new_dynarec.c
@@ -53,6 +53,9 @@ static void __clear_cache(void *start, void *end) {
   sys_dcache_flush(start, len);
   sys_icache_invalidate(start, len);
 }
+#elif defined(_3DS)
+#include "3ds_utils.h"
+#define __clear_cache(start,end) svcFlushProcessDataCache(0xFFFF8001, start, (u32)(end)-(u32)(start))
 #endif
 
 #define MAXBLOCK 4096
@@ -131,7 +134,7 @@ struct ll_entry
   int ccadj[MAXBLOCK];
   int slen;
   u_int instr_addr[MAXBLOCK];
-  u_int link_addr[MAXBLOCK][3];
+  static u_int link_addr[MAXBLOCK][3];
   int linkcount;
   u_int stubs[MAXBLOCK*3][8];
   int stubcount;
@@ -9885,6 +9888,10 @@ int new_recompile_block(int addr)
     {
       cc+=2; // 2 cycle penalty (after CLOCK_DIVIDER)
     }
+    else if(i>1&&itype[i]==STORE&&itype[i-1]==STORE&&itype[i-2]==STORE&&!bt[i])
+    {
+      cc+=4;
+    }
     else if(itype[i]==C2LS)
     {
       cc+=4;