#include <assert.h>
#include <errno.h>
#include <sys/mman.h>
+#ifdef __MACH__
+#include <libkern/OSCacheControl.h>
+#endif
+#ifdef _3DS
+#include <3ds_utils.h>
+#endif
+#ifdef VITA
+#include <psp2/kernel/sysmem.h>
+static int sceBlock;
+int getVMBlock();
+#endif
-#include "emu_if.h" //emulator interface
+#include "new_dynarec_config.h"
+#include "backends/psx/emu_if.h" //emulator interface
//#define DISASM
//#define assem_debug printf
#define inv_debug(...)
#ifdef __i386__
-#include "assem_x86.h"
+#include "x86/assem_x86.h"
#endif
#ifdef __x86_64__
-#include "assem_x64.h"
+#include "x64/assem_x64.h"
#endif
#ifdef __arm__
-#include "assem_arm.h"
+#include "arm/assem_arm.h"
#endif
-#ifdef __BLACKBERRY_QNX__
-#undef __clear_cache
-#define __clear_cache(start,end) msync(start, (size_t)((void*)end - (void*)start), MS_SYNC | MS_CACHE_ONLY | MS_INVALIDATE_ICACHE);
-#elif defined(__MACH__)
-#include <libkern/OSCacheControl.h>
-#define __clear_cache mach_clear_cache
-static void __clear_cache(void *start, void *end) {
- size_t len = (char *)end - (char *)start;
- sys_dcache_flush(start, len);
- sys_icache_invalidate(start, len);
-}
+#ifdef VITA
+int _newlib_vm_size_user = 1 << TARGET_SIZE_2;
#endif
#define MAXBLOCK 4096
static int tracedebug=0;
+static void mprotect_w_x(void *start, void *end, int is_x)
+{
+#ifdef NO_WRITE_EXEC
+ #if defined(VITA)
+ // *Open* enables write on all memory that was
+ // allocated by sceKernelAllocMemBlockForVM()?
+ if (is_x)
+ sceKernelCloseVMDomain();
+ else
+ sceKernelOpenVMDomain();
+ #else
+ u_long mstart = (u_long)start & ~4095ul;
+ u_long mend = (u_long)end;
+ if (mprotect((void *)mstart, mend - mstart,
+ PROT_READ | (is_x ? PROT_EXEC : PROT_WRITE)) != 0)
+ SysPrintf("mprotect(%c) failed: %s\n", is_x ? 'x' : 'w', strerror(errno));
+ #endif
+#endif
+}
+
+static void start_tcache_write(void *start, void *end)
+{
+ mprotect_w_x(start, end, 0);
+}
+
+static void end_tcache_write(void *start, void *end)
+{
+#ifdef __arm__
+ size_t len = (char *)end - (char *)start;
+ #if defined(__BLACKBERRY_QNX__)
+ msync(start, len, MS_SYNC | MS_CACHE_ONLY | MS_INVALIDATE_ICACHE);
+ #elif defined(__MACH__)
+ sys_cache_control(kCacheFunctionPrepareForExecution, start, len);
+ #elif defined(VITA)
+ sceKernelSyncVMDomain(sceBlock, start, len);
+ #elif defined(_3DS)
+ ctr_flush_invalidate_cache();
+ #else
+ __clear_cache(start, end);
+ #endif
+ (void)len;
+#endif
+
+ mprotect_w_x(start, end, 1);
+}
+
+static void *start_block(void)
+{
+ u_char *end = out + MAX_OUTPUT_BLOCK_SIZE;
+ if (end > (u_char *)BASE_ADDR + (1<<TARGET_SIZE_2))
+ end = (u_char *)BASE_ADDR + (1<<TARGET_SIZE_2);
+ start_tcache_write(out, end);
+ return out;
+}
+
+static void end_block(void *start)
+{
+ end_tcache_write(start, out);
+}
+
//#define DEBUG_CYCLE_COUNT 1
#define NO_CYCLE_PENALTY_THR 12
// This is called from the recompiled JR/JALR instructions
void *get_addr(u_int vaddr)
{
- u_int page=get_page(vaddr);
- u_int vpage=get_vpage(vaddr);
- struct ll_entry *head;
+ struct ll_entry *head = NULL;
+ u_int page = get_page(vaddr);
+ u_int vpage = get_vpage(vaddr);
//printf("TRACE: count=%d next=%d (get_addr %x,page %d)\n",Count,next_interupt,vaddr,page);
head=jump_in[page];
- while(head!=NULL) {
- if(head->vaddr==vaddr) {
- //printf("TRACE: count=%d next=%d (get_addr match %x: %x)\n",Count,next_interupt,vaddr,(int)head->addr);
- int *ht_bin=hash_table[((vaddr>>16)^vaddr)&0xFFFF];
+ while(head!=NULL)
+ {
+ if(head->vaddr==vaddr)
+ {
+ //printf("TRACE: count=%d next=%d (get_addr match %x: %x)\n",Count,next_interupt,vaddr,(int)head->addr);
+ u_int *ht_bin=hash_table[((vaddr>>16)^vaddr)&0xFFFF];
ht_bin[3]=ht_bin[1];
ht_bin[2]=ht_bin[0];
- ht_bin[1]=(int)head->addr;
+ ht_bin[1]=(u_int)head->addr;
ht_bin[0]=vaddr;
return head->addr;
}
head=head->next;
}
head=jump_dirty[vpage];
- while(head!=NULL) {
- if(head->vaddr==vaddr) {
+ while(head!=NULL)
+ {
+ if(head->vaddr==vaddr)
+ {
//printf("TRACE: count=%d next=%d (get_addr match dirty %x: %x)\n",Count,next_interupt,vaddr,(int)head->addr);
// Don't restore blocks which are about to expire from the cache
if((((u_int)head->addr-(u_int)out)<<(32-TARGET_SIZE_2))>0x60000000+(MAX_OUTPUT_BLOCK_SIZE<<(32-TARGET_SIZE_2)))
- if(verify_dirty(head->addr)) {
- //printf("restore candidate: %x (%d) d=%d\n",vaddr,page,invalid_code[vaddr>>12]);
- invalid_code[vaddr>>12]=0;
- inv_code_start=inv_code_end=~0;
- if(vpage<2048) {
- restore_candidate[vpage>>3]|=1<<(vpage&7);
- }
- else restore_candidate[page>>3]|=1<<(page&7);
- int *ht_bin=hash_table[((vaddr>>16)^vaddr)&0xFFFF];
- if(ht_bin[0]==vaddr) {
- ht_bin[1]=(int)head->addr; // Replace existing entry
- }
- else
+ if(verify_dirty(head->addr))
{
- ht_bin[3]=ht_bin[1];
- ht_bin[2]=ht_bin[0];
- ht_bin[1]=(int)head->addr;
- ht_bin[0]=vaddr;
+ //printf("restore candidate: %x (%d) d=%d\n",vaddr,page,invalid_code[vaddr>>12]);
+ invalid_code[vaddr>>12]=0;
+ inv_code_start=inv_code_end=~0;
+ if(vpage<2048)
+ {
+ restore_candidate[vpage>>3]|=1<<(vpage&7);
+ }
+ else
+ {
+ restore_candidate[page>>3]|=1<<(page&7);
+ }
+ u_int *ht_bin=hash_table[((vaddr>>16)^vaddr)&0xFFFF];
+
+ if(ht_bin[0]==vaddr)
+ ht_bin[1]=(u_int)head->addr; // Replace existing entry
+ else
+ {
+ ht_bin[3]=ht_bin[1];
+ ht_bin[2]=ht_bin[0];
+ ht_bin[1]=(int)head->addr;
+ ht_bin[0]=vaddr;
+ }
+ return head->addr;
}
- return head->addr;
- }
}
head=head->next;
}
//printf("TRACE: count=%d next=%d (get_addr no-match %x)\n",Count,next_interupt,vaddr);
int r=new_recompile_block(vaddr);
- if(r==0) return get_addr(vaddr);
- // Execute in unmapped page, generate pagefault execption
+ if(r==0)
+ return get_addr(vaddr);
+ // Execute in unmapped page, generate pagefault exception
Status|=2;
Cause=(vaddr<<31)|0x8;
EPC=(vaddr&1)?vaddr-5:vaddr;
EntryHi=BadVAddr&0xFFFFE000;
return get_addr_ht(0x80000000);
}
+
// Look up address in hash table first
void *get_addr_ht(u_int vaddr)
{
//printf("TRACE: count=%d next=%d (get_addr_ht %x)\n",Count,next_interupt,vaddr);
- int *ht_bin=hash_table[((vaddr>>16)^vaddr)&0xFFFF];
+ u_int *ht_bin=hash_table[((vaddr>>16)^vaddr)&0xFFFF];
if(ht_bin[0]==vaddr) return (void *)ht_bin[1];
if(ht_bin[2]==vaddr) return (void *)ht_bin[3];
return get_addr(vaddr);
}
}*/
if(rn<10) return 1;
+ (void)b;
return 0;
}
}
#ifdef __i386__
-#include "assem_x86.c"
+#include "x86/assem_x86.c"
#endif
#ifdef __x86_64__
-#include "assem_x64.c"
+#include "x64/assem_x64.c"
#endif
#ifdef __arm__
-#include "assem_arm.c"
+#include "arm/assem_arm.c"
#endif
// Add virtual address mapping to linked list
void remove_hash(int vaddr)
{
//printf("remove hash: %x\n",vaddr);
- int *ht_bin=hash_table[(((vaddr)>>16)^vaddr)&0xFFFF];
+ u_int *ht_bin=hash_table[(((vaddr)>>16)^vaddr)&0xFFFF];
if(ht_bin[2]==vaddr) {
ht_bin[2]=ht_bin[3]=-1;
}
{
struct ll_entry *cur;
struct ll_entry *next;
- if(cur=*head) {
+ if((cur=*head)) {
*head=0;
while(cur) {
next=cur->next;
}
// Dereference the pointers and remove if it matches
-void ll_kill_pointers(struct ll_entry *head,int addr,int shift)
+static void ll_kill_pointers(struct ll_entry *head,int addr,int shift)
{
while(head) {
int ptr=get_pointer(head->addr);
(((ptr-MAX_OUTPUT_BLOCK_SIZE)>>shift)==(addr>>shift)))
{
inv_debug("EXP: Kill pointer at %x (%x)\n",(int)head->addr,head->vaddr);
- u_int host_addr=(u_int)kill_pointer(head->addr);
+ void *host_addr=find_extjump_insn(head->addr);
#ifdef __arm__
- needs_clear_cache[(host_addr-(u_int)BASE_ADDR)>>17]|=1<<(((host_addr-(u_int)BASE_ADDR)>>12)&31);
+ mark_clear_cache(host_addr);
#endif
+ set_jump_target((int)host_addr,(int)head->addr);
}
head=head->next;
}
jump_out[page]=0;
while(head!=NULL) {
inv_debug("INVALIDATE: kill pointer to %x (%x)\n",head->vaddr,(int)head->addr);
- u_int host_addr=(u_int)kill_pointer(head->addr);
+ void *host_addr=find_extjump_insn(head->addr);
#ifdef __arm__
- needs_clear_cache[(host_addr-(u_int)BASE_ADDR)>>17]|=1<<(((host_addr-(u_int)BASE_ADDR)>>12)&31);
+ mark_clear_cache(host_addr);
#endif
+ set_jump_target((int)host_addr,(int)head->addr);
next=head->next;
free(head);
head=next;
assert(first+5>page); // NB: this assumes MAXBLOCK<=4096 (4 pages)
assert(last<page+5);
// Invalidate the adjacent pages if a block crosses a 4K boundary
- while(first<page) {
+ while(first<page)
+ {
invalidate_page(first);
first++;
}
- for(first=page+1;first<last;first++) {
+ for(first=page+1;first<last;first++)
+ {
invalidate_page(first);
}
- #ifdef __arm__
- do_clear_cache();
- #endif
+
+#ifdef __arm__
+ do_clear_cache();
+#endif
// Don't trap writes
invalid_code[block]=1;
- #ifdef USE_MINI_HT
+#ifdef USE_MINI_HT
memset(mini_ht,-1,sizeof(mini_ht));
- #endif
+#endif
}
void invalidate_block(u_int block)
u_int page=get_page(block<<12);
u_int vpage=get_vpage(block<<12);
inv_debug("INVALIDATE: %x (%d)\n",block<<12,page);
- //inv_debug("invalid_code[block]=%d\n",invalid_code[block]);
u_int first,last;
first=last=page;
struct ll_entry *head;
head=jump_dirty[vpage];
//printf("page=%d vpage=%d\n",page,vpage);
- while(head!=NULL) {
+ while(head!=NULL)
+ {
u_int start,end;
- if(vpage>2047||(head->vaddr>>12)==block) { // Ignore vaddr hash collision
+ if(vpage>2047||(head->vaddr>>12)==block)
+ { // Ignore vaddr hash collision
get_bounds((int)head->addr,&start,&end);
//printf("start: %x end: %x\n",start,end);
- if(page<2048&&start>=(u_int)rdram&&end<(u_int)rdram+RAM_SIZE) {
- if(((start-(u_int)rdram)>>12)<=page&&((end-1-(u_int)rdram)>>12)>=page) {
+ if(page<2048&&start>=(u_int)rdram&&end<(u_int)rdram+RAM_SIZE)
+ {
+ if(((start-(u_int)rdram)>>12)<=page&&((end-1-(u_int)rdram)>>12)>=page)
+ {
if((((start-(u_int)rdram)>>12)&2047)<first) first=((start-(u_int)rdram)>>12)&2047;
if((((end-1-(u_int)rdram)>>12)&2047)>last) last=((end-1-(u_int)rdram)>>12)&2047;
}
// This is called when loading a save state.
// Anything could have changed, so invalidate everything.
-void invalidate_all_pages()
+void invalidate_all_pages(void)
{
- u_int page,n;
+ u_int page;
for(page=0;page<4096;page++)
invalidate_page(page);
for(page=0;page<1048576;page++)
- if(!invalid_code[page]) {
+ {
+ if(!invalid_code[page])
+ {
restore_candidate[(page&2047)>>3]|=1<<(page&7);
restore_candidate[((page&2047)>>3)+256]|=1<<(page&7);
}
- #ifdef __arm__
- __clear_cache((void *)BASE_ADDR,(void *)BASE_ADDR+(1<<TARGET_SIZE_2));
- #endif
- #ifdef USE_MINI_HT
+ }
+
+#ifdef USE_MINI_HT
memset(mini_ht,-1,sizeof(mini_ht));
- #endif
+#endif
}
// Add an entry to jump_out after making a link
inv_debug("add_link: %x -> %x (%d)\n",(int)src,vaddr,page);
int *ptr=(int *)(src+4);
assert((*ptr&0x0fff0000)==0x059f0000);
+ (void)ptr;
ll_add(jump_out+page,vaddr,src);
//int ptr=get_pointer(src);
//inv_debug("add_link: Pointer is to %x\n",(int)ptr);
struct ll_entry *head;
inv_debug("INV: clean_blocks page=%d\n",page);
head=jump_dirty[page];
- while(head!=NULL) {
- if(!invalid_code[head->vaddr>>12]) {
+ while(head!=NULL)
+ {
+ if(!invalid_code[head->vaddr>>12])
+ {
// Don't restore blocks which are about to expire from the cache
- if((((u_int)head->addr-(u_int)out)<<(32-TARGET_SIZE_2))>0x60000000+(MAX_OUTPUT_BLOCK_SIZE<<(32-TARGET_SIZE_2))) {
+ if((((u_int)head->addr-(u_int)out)<<(32-TARGET_SIZE_2))>0x60000000+(MAX_OUTPUT_BLOCK_SIZE<<(32-TARGET_SIZE_2)))
+ {
u_int start,end;
- if(verify_dirty((int)head->addr)) {
+ if(verify_dirty(head->addr))
+ {
//printf("Possibly Restore %x (%x)\n",head->vaddr, (int)head->addr);
u_int i;
u_int inv=0;
get_bounds((int)head->addr,&start,&end);
- if(start-(u_int)rdram<RAM_SIZE) {
- for(i=(start-(u_int)rdram+0x80000000)>>12;i<=(end-1-(u_int)rdram+0x80000000)>>12;i++) {
+ if(start-(u_int)rdram<RAM_SIZE)
+ {
+ for(i=(start-(u_int)rdram+0x80000000)>>12;i<=(end-1-(u_int)rdram+0x80000000)>>12;i++)
+ {
inv|=invalid_code[i];
}
}
- else if((signed int)head->vaddr>=(signed int)0x80000000+RAM_SIZE) {
+ else if((signed int)head->vaddr>=(signed int)0x80000000+RAM_SIZE)
+ {
inv=1;
}
- if(!inv) {
+ if(!inv)
+ {
void * clean_addr=(void *)get_clean_addr((int)head->addr);
- if((((u_int)clean_addr-(u_int)out)<<(32-TARGET_SIZE_2))>0x60000000+(MAX_OUTPUT_BLOCK_SIZE<<(32-TARGET_SIZE_2))) {
+ if((((u_int)clean_addr-(u_int)out)<<(32-TARGET_SIZE_2))>0x60000000+(MAX_OUTPUT_BLOCK_SIZE<<(32-TARGET_SIZE_2)))
+ {
u_int ppage=page;
inv_debug("INV: Restored %x (%x/%x)\n",head->vaddr, (int)head->addr, (int)clean_addr);
//printf("page=%x, addr=%x\n",page,head->vaddr);
//assert(head->vaddr>>12==(page|0x80000));
ll_add_flags(jump_in+ppage,head->vaddr,head->reg_sv_flags,clean_addr);
- int *ht_bin=hash_table[((head->vaddr>>16)^head->vaddr)&0xFFFF];
- if(ht_bin[0]==head->vaddr) {
- ht_bin[1]=(int)clean_addr; // Replace existing entry
+ u_int *ht_bin=hash_table[((head->vaddr>>16)^head->vaddr)&0xFFFF];
+ if(ht_bin[0]==head->vaddr)
+ {
+ ht_bin[1]=(u_int)clean_addr; // Replace existing entry
}
- if(ht_bin[2]==head->vaddr) {
- ht_bin[3]=(int)clean_addr; // Replace existing entry
+ if(ht_bin[2]==head->vaddr)
+ {
+ ht_bin[3]=(u_int)clean_addr; // Replace existing entry
}
}
}
}
}
-
-void mov_alloc(struct regstat *current,int i)
+static void mov_alloc(struct regstat *current,int i)
{
// Note: Don't need to actually alloc the source registers
- if((~current->is32>>rs1[i])&1) {
+ if((~current->is32>>rs1[i])&1)
+ {
//alloc_reg64(current,i,rs1[i]);
alloc_reg64(current,i,rt1[i]);
current->is32&=~(1LL<<rt1[i]);
- } else {
+ }
+ else
+ {
//alloc_reg(current,i,rs1[i]);
alloc_reg(current,i,rt1[i]);
current->is32|=(1LL<<rt1[i]);
void delayslot_alloc(struct regstat *current,int i)
{
- switch(itype[i]) {
+ switch(itype[i])
+ {
case UJUMP:
case CJUMP:
case SJUMP:
}
}
-int mchecksum()
+#if 0
+static int mchecksum(void)
{
//if(!tracedebug) return 0;
int i;
}
return sum;
}
-int rchecksum()
+
+static int rchecksum(void)
{
int i;
int sum=0;
sum^=((u_int *)reg)[i];
return sum;
}
-void rlist()
+
+static void rlist(void)
{
int i;
printf("TRACE: ");
printf("\n");
}
-void enabletrace()
+static void enabletrace(void)
{
tracedebug=1;
}
-void memdebug(int i)
+static void memdebug(int i)
{
//printf("TRACE: count=%d next=%d (checksum %x) lo=%8x%8x\n",Count,next_interupt,mchecksum(),(int)(reg[LOREG]>>32),(int)reg[LOREG]);
//printf("TRACE: count=%d next=%d (rchecksum %x)\n",Count,next_interupt,rchecksum());
}
//printf("TRACE: %x\n",(&i)[-1]);
}
+#endif
void alu_assemble(int i,struct regstat *i_regs)
{
emit_mov(sh,th);
}
}
- if(opcode[i]==0x0d) //ORI
- if(sl<0) {
- emit_orimm(tl,imm[i],tl);
- }else{
- if(!((i_regs->wasconst>>sl)&1))
- emit_orimm(sl,imm[i],tl);
- else
- emit_movimm(constmap[i][sl]|imm[i],tl);
+ if(opcode[i]==0x0d) { // ORI
+ if(sl<0) {
+ emit_orimm(tl,imm[i],tl);
+ }else{
+ if(!((i_regs->wasconst>>sl)&1))
+ emit_orimm(sl,imm[i],tl);
+ else
+ emit_movimm(constmap[i][sl]|imm[i],tl);
+ }
}
- if(opcode[i]==0x0e) //XORI
- if(sl<0) {
- emit_xorimm(tl,imm[i],tl);
- }else{
- if(!((i_regs->wasconst>>sl)&1))
- emit_xorimm(sl,imm[i],tl);
- else
- emit_movimm(constmap[i][sl]^imm[i],tl);
+ if(opcode[i]==0x0e) { // XORI
+ if(sl<0) {
+ emit_xorimm(tl,imm[i],tl);
+ }else{
+ if(!((i_regs->wasconst>>sl)&1))
+ emit_xorimm(sl,imm[i],tl);
+ else
+ emit_movimm(constmap[i][sl]^imm[i],tl);
+ }
}
}
else {
//printf("load_assemble: c=%d\n",c);
//if(c) printf("load_assemble: const=%x\n",(int)constmap[i][s]+offset);
// FIXME: Even if the load is a NOP, we should check for pagefaults...
- if(tl<0&&(!c||(((u_int)constmap[i][s]+offset)>>16)==0x1f80)
+ if((tl<0&&(!c||(((u_int)constmap[i][s]+offset)>>16)==0x1f80))
||rt1[i]==0) {
// could be FIFO, must perform the read
// ||dummy read
emit_call((int)memdebug);
//emit_popa();
restore_regs(0x100f);
- }/**/
+ }*/
}
#ifndef loadlr_assemble
int s,th,tl,map=-1;
int addr,temp;
int offset;
- int jaddr=0,jaddr2,type;
+ int jaddr=0,type;
int memtarget=0,c=0;
int agr=AGEN1+(i&1);
int faststore_reg_override=0;
#if defined(HAVE_CONDITIONAL_CALL) && !defined(DESTRUCTIVE_SHIFT)
emit_callne(invalidate_addr_reg[addr]);
#else
- jaddr2=(int)out;
+ int jaddr2=(int)out;
emit_jne(0);
add_stub(INVCODE_STUB,jaddr2,(int)out,reglist|(1<<HOST_CCREG),addr,0,0,0);
#endif
#ifdef __arm__
restore_regs(0x100f);
#endif
- }/**/
+ }*/
}
void storelr_assemble(int i,struct regstat *i_regs)
{
int s,th,tl;
int temp;
- int temp2;
+ int temp2=-1;
int offset;
- int jaddr=0,jaddr2;
+ int jaddr=0;
int case1,case2,case3;
int done0,done1,done2;
int memtarget=0,c=0;
#if defined(HAVE_CONDITIONAL_CALL) && !defined(DESTRUCTIVE_SHIFT)
emit_callne(invalidate_addr_reg[temp]);
#else
- jaddr2=(int)out;
+ int jaddr2=(int)out;
emit_jne(0);
add_stub(INVCODE_STUB,jaddr2,(int)out,reglist|(1<<HOST_CCREG),temp,0,0,0);
#endif
emit_call((int)memdebug);
emit_popa();
//restore_regs(0x100f);
- /**/
+ */
}
void c1ls_assemble(int i,struct regstat *i_regs)
int ar;
int offset;
int memtarget=0,c=0;
- int jaddr2=0,jaddr3,type;
+ int jaddr2=0,type;
int agr=AGEN1+(i&1);
int fastio_reg_override=0;
u_int hr,reglist=0;
#if defined(HAVE_CONDITIONAL_CALL) && !defined(DESTRUCTIVE_SHIFT)
emit_callne(invalidate_addr_reg[ar]);
#else
- jaddr3=(int)out;
+ int jaddr3=(int)out;
emit_jne(0);
add_stub(INVCODE_STUB,jaddr3,(int)out,reglist|(1<<HOST_CCREG),ar,0,0,0);
#endif
signed char ccreg=get_reg(i_regs->regmap,CCREG);
assert(ccreg==HOST_CCREG);
assert(!is_delayslot);
+ (void)ccreg;
emit_movimm(start+i*4,EAX); // Get PC
emit_addimm(HOST_CCREG,CLOCK_ADJUST(ccadj[i]),HOST_CCREG); // CHECK: is this right? There should probably be an extra cycle...
emit_jmp((int)jump_syscall_hle); // XXX
signed char ccreg=get_reg(i_regs->regmap,CCREG);
assert(ccreg==HOST_CCREG);
assert(!is_delayslot);
+ (void)ccreg;
emit_movimm(start+i*4+4,0); // Get PC
emit_movimm((int)psxHLEt[source[i]&7],1);
emit_addimm(HOST_CCREG,CLOCK_ADJUST(ccadj[i]),HOST_CCREG); // XXX
signed char ccreg=get_reg(i_regs->regmap,CCREG);
assert(ccreg==HOST_CCREG);
assert(!is_delayslot);
+ (void)ccreg;
emit_movimm(start+i*4,0); // Get PC
emit_addimm(HOST_CCREG,CLOCK_ADJUST(ccadj[i]),HOST_CCREG);
emit_jmp((int)jump_intcall);
void ujump_assemble(int i,struct regstat *i_regs)
{
- signed char *i_regmap=i_regs->regmap;
int ra_done=0;
if(i==(ba[i]-start)>>2) assem_debug("idle loop\n");
address_generation(i+1,i_regs,regs[i].regmap_entry);
int temp=get_reg(branch_regs[i].regmap,PTEMP);
if(rt1[i]==31&&temp>=0)
{
+ signed char *i_regmap=i_regs->regmap;
int return_address=start+i*4+8;
if(get_reg(branch_regs[i].regmap,31)>0)
if(i_regmap[temp]==PTEMP) emit_movimm((int)hash_table[((return_address>>16)^return_address)&0xFFFF],temp);
void rjump_assemble(int i,struct regstat *i_regs)
{
- signed char *i_regmap=i_regs->regmap;
int temp;
- int rs,cc,adj;
+ int rs,cc;
int ra_done=0;
rs=get_reg(branch_regs[i].regmap,rs1[i]);
assert(rs>=0);
if(rt1[i]==31)
{
if((temp=get_reg(branch_regs[i].regmap,PTEMP))>=0) {
+ signed char *i_regmap=i_regs->regmap;
int return_address=start+i*4+8;
if(i_regmap[temp]==PTEMP) emit_movimm((int)hash_table[((return_address>>16)^return_address)&0xFFFF],temp);
}
rjump_assemble_write_ra(i);
cc=get_reg(branch_regs[i].regmap,CCREG);
assert(cc==HOST_CCREG);
+ (void)cc;
#ifdef USE_MINI_HT
int rh=get_reg(branch_regs[i].regmap,RHASH);
int ht=get_reg(branch_regs[i].regmap,RHTBL);
int s1h=get_reg(i_regs->regmap,rs1[i]|64);
int s2l=get_reg(i_regs->regmap,rs2[i]);
int s2h=get_reg(i_regs->regmap,rs2[i]|64);
- void *nt_branch=NULL;
int taken=0;
int nottaken=0;
int unconditional=0;
s1h=s2h=-1;
}
int hr=0;
- int addr,alt,ntaddr;
+ int addr=-1,alt=-1,ntaddr=-1;
if(i_regs->regmap[HOST_BTREG]<0) {addr=HOST_BTREG;}
else {
while(hr<HOST_REGS)
if(r!=EXCLUDE_REG) {
if(regs[i].regmap[r]==regmap_pre[i+2][r]) {
regs[i+2].wasdirty&=wont_dirty_i|~(1<<r);
- }else {/*printf("i: %x (%d) mismatch(+2): %d\n",start+i*4,i,r);/*assert(!((wont_dirty_i>>r)&1));*/}
+ }else {/*printf("i: %x (%d) mismatch(+2): %d\n",start+i*4,i,r);assert(!((wont_dirty_i>>r)&1));*/}
}
}
}
if(r!=EXCLUDE_REG) {
if(regs[i].regmap[r]==regmap_pre[i+1][r]) {
regs[i+1].wasdirty&=wont_dirty_i|~(1<<r);
- }else {/*printf("i: %x (%d) mismatch(+1): %d\n",start+i*4,i,r);/*assert(!((wont_dirty_i>>r)&1));*/}
+ }else {/*printf("i: %x (%d) mismatch(+1): %d\n",start+i*4,i,r);assert(!((wont_dirty_i>>r)&1));*/}
}
}
}
wont_dirty_i|=((unneeded_reg[i]>>(regmap_pre[i][r]&63))&1)<<r;
} else {
wont_dirty_i|=1<<r;
- /*printf("i: %x (%d) mismatch: %d\n",start+i*4,i,r);/*assert(!((will_dirty>>r)&1));*/
+ /*printf("i: %x (%d) mismatch: %d\n",start+i*4,i,r);assert(!((will_dirty>>r)&1));*/
}
}
}
static int new_dynarec_test(void)
{
int (*testfunc)(void) = (void *)out;
+ void *beginning;
int ret;
+
+ beginning = start_block();
emit_movimm(DRC_TEST_VAL,0); // test
emit_jmpreg(14);
literal_pool(0);
-#ifdef __arm__
- __clear_cache((void *)testfunc, out);
-#endif
+ end_block(beginning);
SysPrintf("testing if we can run recompiled code..\n");
ret = testfunc();
if (ret == DRC_TEST_VAL)
// clear the state completely, instead of just marking
// things invalid like invalidate_all_pages() does
-void new_dynarec_clear_full()
+void new_dynarec_clear_full(void)
{
int n;
out=(u_char *)BASE_ADDR;
for(n=0;n<4096;n++) ll_clear(jump_dirty+n);
}
-void new_dynarec_init()
+void new_dynarec_init(void)
{
SysPrintf("Init new dynarec\n");
- out=(u_char *)BASE_ADDR;
-#if BASE_ADDR_FIXED
- if (mmap (out, 1<<TARGET_SIZE_2,
- PROT_READ | PROT_WRITE | PROT_EXEC,
- MAP_FIXED | MAP_PRIVATE | MAP_ANONYMOUS,
- -1, 0) <= 0) {
+
+ // allocate/prepare a buffer for translation cache
+ // see assem_arm.h for some explanation
+#if defined(BASE_ADDR_FIXED)
+ if (mmap (translation_cache, 1 << TARGET_SIZE_2,
+ PROT_READ | PROT_WRITE | PROT_EXEC,
+ MAP_PRIVATE | MAP_ANONYMOUS,
+ -1, 0) != translation_cache)
+ {
+ SysPrintf("mmap() failed: %s\n", strerror(errno));
+ SysPrintf("disable BASE_ADDR_FIXED and recompile\n");
+ abort();
+ }
+#elif defined(BASE_ADDR_DYNAMIC)
+#ifdef VITA
+ sceBlock = getVMBlock();//sceKernelAllocMemBlockForVM("code", 1 << TARGET_SIZE_2);
+ if (sceBlock < 0)
+ SysPrintf("sceKernelAllocMemBlockForVM failed\n");
+ int ret = sceKernelGetMemBlockBase(sceBlock, (void **)&translation_cache);
+ if (ret < 0)
+ SysPrintf("sceKernelGetMemBlockBase failed\n");
+
+ sceKernelOpenVMDomain();
+ sceClibPrintf("translation_cache = 0x%08X \n ", translation_cache);
+#elif defined(_MSC_VER)
+ base_addr = VirtualAlloc(NULL, 1<<TARGET_SIZE_2, MEM_COMMIT | MEM_RESERVE,
+ PAGE_EXECUTE_READWRITE);
+#else
+ translation_cache = mmap (NULL, 1 << TARGET_SIZE_2,
+ PROT_READ | PROT_WRITE | PROT_EXEC,
+ MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
+ if (translation_cache == MAP_FAILED) {
SysPrintf("mmap() failed: %s\n", strerror(errno));
+ abort();
}
+#endif
#else
+#ifndef NO_WRITE_EXEC
// not all systems allow execute in data segment by default
- if (mprotect(out, 1<<TARGET_SIZE_2, PROT_READ | PROT_WRITE | PROT_EXEC) != 0)
+ if (mprotect((void *)BASE_ADDR, 1<<TARGET_SIZE_2, PROT_READ | PROT_WRITE | PROT_EXEC) != 0)
SysPrintf("mprotect() failed: %s\n", strerror(errno));
#endif
- int n;
+#endif
+
+ out=(u_char *)BASE_ADDR;
cycle_multiplier=200;
new_dynarec_clear_full();
#ifdef HOST_IMM8
SysPrintf("warning: RAM is not directly mapped, performance will suffer\n");
}
-void new_dynarec_cleanup()
+void new_dynarec_cleanup(void)
{
int n;
- #if BASE_ADDR_FIXED
- if (munmap ((void *)BASE_ADDR, 1<<TARGET_SIZE_2) < 0) {SysPrintf("munmap() failed\n");}
- #endif
- for(n=0;n<4096;n++) ll_clear(jump_in+n);
- for(n=0;n<4096;n++) ll_clear(jump_out+n);
- for(n=0;n<4096;n++) ll_clear(jump_dirty+n);
- #ifdef ROM_COPY
+#if defined(BASE_ADDR_FIXED) || defined(BASE_ADDR_DYNAMIC)
+#ifndef VITA
+#if defined(_MSC_VER)
+ VirtualFree(base_addr, 0, MEM_RELEASE);
+#else
+ if (munmap ((void *)BASE_ADDR, 1<<TARGET_SIZE_2) < 0)
+ SysPrintf("munmap() failed\n");
+#endif
+#endif
+#endif
+ for(n=0;n<4096;n++)
+ ll_clear(jump_in+n);
+ for(n=0;n<4096;n++)
+ ll_clear(jump_out+n);
+ for(n=0;n<4096;n++)
+ ll_clear(jump_dirty+n);
+#ifdef ROM_COPY
if (munmap (ROM_COPY, 67108864) < 0) {SysPrintf("munmap() failed\n");}
- #endif
+#endif
}
static u_int *get_source_start(u_int addr, u_int *limit)
*limit = (addr & 0x80600000) + 0x00200000;
return (u_int *)((u_int)rdram + (addr&0x1fffff));
}
+ return NULL;
}
static u_int scan_for_ret(u_int addr)
if (*mem == 0x03e00008) // jr $ra
return addr + 8;
}
+ return addr;
}
struct savestate_block {
if (Config.HLE && start == 0x80001000) // hlecall
{
// XXX: is this enough? Maybe check hleSoftCall?
- u_int beginning=(u_int)out;
+ void *beginning=start_block();
u_int page=get_page(start);
+
invalid_code[start>>12]=0;
emit_movimm(start,0);
emit_writeword(0,(int)&pcaddr);
emit_jmp((int)new_dyna_leave);
literal_pool(0);
-#ifdef __arm__
- __clear_cache((void *)beginning,out);
-#endif
+ end_block(beginning);
ll_add_flags(jump_in+page,start,state_rflags,(void *)beginning);
return 0;
}
// Create entry (branch target) regmap
for(hr=0;hr<HOST_REGS;hr++)
{
- int r,or,er;
+ int r,or;
r=current.regmap[hr];
if(r>=0) {
if(r!=regmap_pre[i][hr]) {
cop1_usable=0;
uint64_t is32_pre=0;
u_int dirty_pre=0;
- u_int beginning=(u_int)out;
+ void *beginning=start_block();
if((u_int)addr&1) {
ds=1;
pagespan_ds();
// replace it with the new address.
// Don't add new entries. We'll insert the
// ones that actually get used in check_addr().
- int *ht_bin=hash_table[((vaddr>>16)^vaddr)&0xFFFF];
+ u_int *ht_bin=hash_table[((vaddr>>16)^vaddr)&0xFFFF];
if(ht_bin[0]==vaddr) {
ht_bin[1]=entry_point;
}
// Align code
if(((u_int)out)&7) emit_addnop(13);
#endif
- assert((u_int)out-beginning<MAX_OUTPUT_BLOCK_SIZE);
+ assert((u_int)out-(u_int)beginning<MAX_OUTPUT_BLOCK_SIZE);
//printf("shadow buffer: %x-%x\n",(int)copy,(int)copy+slen*4);
memcpy(copy,source,slen*4);
copy+=slen*4;
- #ifdef __arm__
- __clear_cache((void *)beginning,out);
- #endif
+ end_block(beginning);
// If we're within 256K of the end of the buffer,
// start over from the beginning. (Is 256K enough?)
case 2:
// Clear hash table
for(i=0;i<32;i++) {
- int *ht_bin=hash_table[((expirep&2047)<<5)+i];
+ u_int *ht_bin=hash_table[((expirep&2047)<<5)+i];
if((ht_bin[3]>>shift)==(base>>shift) ||
((ht_bin[3]-MAX_OUTPUT_BLOCK_SIZE)>>shift)==(base>>shift)) {
inv_debug("EXP: Remove hash %x -> %x\n",ht_bin[2],ht_bin[3]);
notaz.gp2x.de / pcsx_rearmed.git / blobdiff