{
#ifdef FORCE32
return get_addr(vaddr);
-#endif
+#else
//printf("TRACE: count=%d next=%d (get_addr_32 %x,flags %x)\n",Count,next_interupt,vaddr,flags);
int *ht_bin=hash_table[((vaddr>>16)^vaddr)&0xFFFF];
if(ht_bin[0]==vaddr) return (void *)ht_bin[1];
Context=(Context&0xFF80000F)|((BadVAddr>>9)&0x007FFFF0);
EntryHi=BadVAddr&0xFFFFE000;
return get_addr_ht(0x80000000);
+#endif
}
void clear_all_regs(signed char regmap[])
//if(c) printf("load_assemble: const=%x\n",(int)constmap[i][s]+offset);
// FIXME: Even if the load is a NOP, we should check for pagefaults...
#ifdef PCSX
- if(tl<0) {
- if(!c||(((u_int)constmap[i][s]+offset)>>16)==0x1f80) {
+ if(tl<0&&(!c||(((u_int)constmap[i][s]+offset)>>16)==0x1f80)
+ ||rt1[i]==0) {
// could be FIFO, must perform the read
+ // ||dummy read
assem_debug("(forced read)\n");
tl=get_reg(i_regs->regmap,-1);
assert(tl>=0);
- }
}
+#endif
if(offset||s<0||c) addr=tl;
else addr=s;
-#endif
if(tl>=0) {
//assert(tl>=0);
//assert(rt1[i]);
{
//if(opcode2[i]==0x10||opcode2[i]==0x12) { // MFHI/MFLO
//if(opcode2[i]==0x11||opcode2[i]==0x13) { // MTHI/MTLO
- assert(rt1[i]>0);
+ //assert(rt1[i]>0);
if(rt1[i]) {
signed char sh,sl,th,tl;
th=get_reg(i_regs->regmap,rt1[i]|64);
case FJUMP:
printf (" %x: %s %8x\n",start+i*4,insn[i],ba[i]);break;
case RJUMP:
- if (rt1[i]!=31)
+ if (opcode[i]==0x9&&rt1[i]!=31)
printf (" %x: %s r%d,r%d\n",start+i*4,insn[i],rt1[i],rs1[i]);
else
printf (" %x: %s r%d\n",start+i*4,insn[i],rs1[i]);
start = (u_int)addr&~3;
//assert(((u_int)addr&1)==0);
#ifdef PCSX
- if (Config.HLE && start == 0x80001000) {
+ if (Config.HLE && start == 0x80001000) // hlecall
+ {
// XXX: is this enough? Maybe check hleSoftCall?
u_int beginning=(u_int)out;
u_int page=get_page(start);
- ll_add(jump_in+page,start,out);
invalid_code[start>>12]=0;
emit_movimm(start,0);
emit_writeword(0,(int)&pcaddr);
#ifdef __arm__
__clear_cache((void *)beginning,out);
#endif
+ ll_add(jump_in+page,start,(void *)beginning);
return 0;
}
- else if ((u_int)addr < 0x00200000) {
+ else if ((u_int)addr < 0x00200000 ||
+ (0xa0000000 <= addr && addr < 0xa0200000)) {
// used for BIOS calls mostly?
- source = (u_int *)((u_int)rdram+start-0);
- pagelimit = 0x00200000;
+ source = (u_int *)((u_int)rdram+(start&0x1fffff));
+ pagelimit = (addr&0xa0000000)|0x00200000;
+ }
+ else if (!Config.HLE && (
+/* (0x9fc00000 <= addr && addr < 0x9fc80000) ||*/
+ (0xbfc00000 <= addr && addr < 0xbfc80000))) {
+ // BIOS
+ source = (u_int *)((u_int)psxR+(start&0x7ffff));
+ pagelimit = (addr&0xfff00000)|0x80000;
}
else
#endif
else {
assem_debug("Compile at unmapped memory address: %x \n", (int)addr);
//assem_debug("start: %x next: %x\n",memory_map[start>>12],memory_map[(start+4096)>>12]);
- return 1; // Caller will invoke exception handler
+ return -1; // Caller will invoke exception handler
}
//printf("source= %x\n",(int)source);
}
case 0x02: strcpy(insn[i],"TLBWI"); type=COP0; break;
case 0x06: strcpy(insn[i],"TLBWR"); type=COP0; break;
case 0x08: strcpy(insn[i],"TLBP"); type=COP0; break;
+#ifdef PCSX
+ case 0x10: strcpy(insn[i],"RFE"); type=COP0; break;
+#else
case 0x18: strcpy(insn[i],"ERET"); type=COP0; break;
+#endif
}
}
break;
if (rt1[i]==31) {
alloc_reg(¤t,i,31);
dirty_reg(¤t,31);
- assert(rs1[i+1]!=31&&rs2[i+1]!=31);
+ //assert(rs1[i+1]!=31&&rs2[i+1]!=31);
+ assert(rt1[i+1]!=rt1[i]);
#ifdef REG_PREFETCH
alloc_reg(¤t,i,PTEMP);
#endif
if (rt1[i]!=0) {
alloc_reg(¤t,i,rt1[i]);
dirty_reg(¤t,rt1[i]);
- assert(rs1[i+1]!=31&&rs2[i+1]!=31);
+ //assert(rs1[i+1]!=31&&rs2[i+1]!=31);
+ assert(rt1[i+1]!=rt1[i]);
#ifdef REG_PREFETCH
alloc_reg(¤t,i,PTEMP);
#endif
ds=1;
pagespan_ds();
}
+ u_int instr_addr0_override=0;
+
+#ifdef PCSX
+ if (start == 0x80030000) {
+ // nasty hack for fastbios thing
+ instr_addr0_override=(u_int)out;
+ emit_movimm(start,0);
+ emit_readword((int)&pcaddr,1);
+ emit_writeword(0,(int)&pcaddr);
+ emit_cmp(0,1);
+ emit_jne((int)new_dyna_leave);
+ }
+#endif
for(i=0;i<slen;i++)
{
//if(ds) printf("ds: ");
}
}
+ if (instr_addr0_override)
+ instr_addr[0] = instr_addr0_override;
+
/* Pass 9 - Linker */
for(i=0;i<linkcount;i++)
{