diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c
-index f1005db..ebd1d4f 100644
+index 2d3348e8..a85d2cd4 100644
--- a/libpcsxcore/new_dynarec/new_dynarec.c
+++ b/libpcsxcore/new_dynarec/new_dynarec.c
-@@ -235,7 +235,7 @@ static struct decoded_insn
+@@ -318,7 +318,7 @@ static struct compile_info
int new_dynarec_hacks_old;
int new_dynarec_did_compile;
extern int cycle_count; // ... until end of the timeslice, counts -N -> 0
extern int last_count; // last absolute target, often = next_interupt
-@@ -471,6 +471,7 @@ int cycle_multiplier_old;
+@@ -598,6 +598,7 @@ static int cycle_multiplier_active;
static int CLOCK_ADJUST(int x)
{
+ return x * 2;
- int m = cycle_multiplier_override && cycle_multiplier == CYCLE_MULT_DEFAULT
- ? cycle_multiplier_override : cycle_multiplier;
- int s=(x>>31)|1;
-@@ -522,6 +523,9 @@ static int doesnt_expire_soon(void *tcaddr)
+ int m = cycle_multiplier_active;
+ int s = (x >> 31) | 1;
+ return (x * m + s * 50) / 100;
+@@ -752,6 +753,9 @@ static void *try_restore_block(u_int vaddr, u_int start_page, u_int end_page)
// This is called from the recompiled JR/JALR instructions
- void noinline *get_addr(u_int vaddr)
+ static void noinline *get_addr(u_int vaddr, int can_compile)
{
+#ifdef DRC_DBG
+printf("get_addr %08x, pc=%08x\n", vaddr, psxRegs.pc);
+#endif
- u_int page=get_page(vaddr);
- u_int vpage=get_vpage(vaddr);
- struct ll_entry *head;
-@@ -6248,7 +6252,7 @@ void unneeded_registers(int istart,int iend,int r)
+ u_int start_page = get_page_prev(vaddr);
+ u_int i, page, end_page = get_page(vaddr);
+ void *found_clean = NULL;
+@@ -7164,7 +7168,7 @@ static noinline void pass2_unneeded_regs(int istart,int iend,int r)
// R0 is always unneeded
u|=1;
// Save it
gte_unneeded[i]=gte_u;
/*
printf("ur (%d,%d) %x: ",istart,iend,start+i*4);
-@@ -8794,6 +8798,7 @@ int new_recompile_block(u_int addr)
-
- // This allocates registers (if possible) one instruction prior
- // to use, which can avoid a load-use penalty on certain CPUs.
-+#if 0
+@@ -8315,6 +8319,7 @@ static noinline void pass5a_preallocate1(void)
+ static noinline void pass5b_preallocate2(void)
+ {
+ int i, hr;
++ return;
for(i=0;i<slen-1;i++)
{
if (!i || !dops[i-1].is_jump)
-@@ -8950,6 +8955,7 @@ int new_recompile_block(u_int addr)
- }
- }
- }
-+#endif
+@@ -9124,6 +9129,14 @@ static int new_recompile_block(u_int addr)
+ load_reg(regs[i].regmap_entry,regs[i].regmap,INVCP);
- /* Pass 6 - Optimize clean/dirty state */
- clean_registers(0,slen-1,1);
-@@ -9204,6 +9210,11 @@ int new_recompile_block(u_int addr)
- load_regs(regs[i].regmap_entry,regs[i].regmap,INVCP,INVCP);
-
- ds = assemble(i, ®s[i], ccadj[i]);
+ ds = assemble(i, ®s[i], cinfo[i].ccadj);
+#ifdef DRC_DBG
+ // write-out non-consts, consts are likely different because of get_final_value()
-+ if (!dops[i].is_jump)
-+ wb_dirtys(regs[i].regmap,regs[i].dirty&~regs[i].loadedconst);
++ if (regs[i].dirty & ~regs[i].loadedconst) {
++ assem_debug("/ drc_dbg_wb\n");
++ wb_dirtys(regs[i].regmap, regs[i].dirty & ~regs[i].loadedconst);
++ assem_debug("\\ drc_dbg_wb\n");
++ }
+#endif
if (dops[i].is_ujump)
literal_pool(1024);
-@@ -9439,6 +9450,10 @@ int new_recompile_block(u_int addr)
- }
+@@ -9316,6 +9329,10 @@ static int new_recompile_block(u_int addr)
+
#ifdef ASSEM_PRINT
fflush(stdout);
+#endif
+printf("new_recompile_block done\n");
+fflush(stdout);
#endif
+ stat_inc(stat_bc_direct);
return 0;
- }
diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
-index bb471b6..8f68a3b 100644
+index 190f8fc7..5feb7a02 100644
--- a/libpcsxcore/new_dynarec/pcsxmem.c
+++ b/libpcsxcore/new_dynarec/pcsxmem.c
-@@ -272,6 +272,8 @@ static void write_biu(u32 value)
- if (address != 0xfffe0130)
+@@ -289,6 +289,8 @@ static void write_biu(u32 value)
return;
+ }
+extern u32 handler_cycle;
+handler_cycle = psxRegs.cycle;
- switch (value) {
- case 0x800: case 0x804:
- unmap_ram_write();
+ memprintf("write_biu %08x @%08x %u\n", value, psxRegs.pc, psxRegs.cycle);
+ psxRegs.biuReg = value;
+ }
diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c
-index b2cc07b..f916580 100644
+index 18bd6a4e..bc2eb3f6 100644
--- a/libpcsxcore/psxcounters.c
+++ b/libpcsxcore/psxcounters.c
-@@ -378,9 +378,12 @@ void psxRcntUpdate()
+@@ -389,9 +389,12 @@ void psxRcntUpdate()
/******************************************************************************/
_psxRcntWcount( index, value );
psxRcntSet();
-@@ -389,6 +392,7 @@ void psxRcntWcount( u32 index, u32 value )
+@@ -400,6 +403,7 @@ void psxRcntWcount( u32 index, u32 value )
void psxRcntWmode( u32 index, u32 value )
{
verboseLog( 1, "[RCNT %i] wmode: %x\n", index, value );
_psxRcntWmode( index, value );
_psxRcntWcount( index, 0 );
-@@ -400,6 +404,7 @@ void psxRcntWmode( u32 index, u32 value )
+@@ -411,6 +415,7 @@ void psxRcntWmode( u32 index, u32 value )
void psxRcntWtarget( u32 index, u32 value )
{
verboseLog( 1, "[RCNT %i] wtarget: %x\n", index, value );
rcnts[index].target = value;
-@@ -412,6 +417,7 @@ void psxRcntWtarget( u32 index, u32 value )
+@@ -423,6 +428,7 @@ void psxRcntWtarget( u32 index, u32 value )
u32 psxRcntRcount( u32 index )
{
u32 count;
count = _psxRcntRcount( index );
+diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
+index e212d8a9..b98b694e 100644
+--- a/libpcsxcore/psxinterpreter.c
++++ b/libpcsxcore/psxinterpreter.c
+@@ -237,7 +237,7 @@ static inline void addCycle(psxRegisters *regs)
+ {
+ assert(regs->subCycleStep >= 0x10000);
+ regs->subCycle += regs->subCycleStep;
+- regs->cycle += regs->subCycle >> 16;
++ regs->cycle += 2; //regs->subCycle >> 16;
+ regs->subCycle &= 0xffff;
+ }
+
+@@ -1341,8 +1341,14 @@ static void intShutdown() {
+
+ // single step (may do several ops in case of a branch or load delay)
+ void execI(psxRegisters *regs) {
++ extern int last_count;
++ void do_insn_cmp(void);
++ printf("execI %08x c %u, ni %u\n", regs->pc, regs->cycle, next_interupt);
++ last_count = 0;
+ do {
+ execIbp(psxMemRLUT, regs);
++ if (regs->dloadReg[0] || regs->dloadReg[1])
++ do_insn_cmp();
+ } while (regs->dloadReg[0] || regs->dloadReg[1]);
+ }
+
notaz.gp2x.de / pcsx_rearmed.git / blobdiff