SPUDMA_INT(words * 4);
return;
-#ifdef PSXDMA_LOG
default:
- PSXDMA_LOG("*** DMA4 SPU - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
+ log_unhandled("*** DMA4 SPU - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
break;
-#endif
}
HW_DMA4_CHCR &= SWAP32(~0x01000000);
// next 32-bit pointer
addr = psxMu32( addr & ~0x3 ) & 0xffffff;
size += 1;
- } while (addr != 0xffffff);
+ } while (!(addr & 0x800000)); // contrary to some documentation, the end-of-linked-list marker is not actually 0xFF'FFFF
+ // any pointer with bit 23 set will do.
return size;
}
GPUDMA_INT(size);
return;
-#ifdef PSXDMA_LOG
default:
- PSXDMA_LOG("*** DMA 2 - GPU unknown *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
+ log_unhandled("*** DMA 2 - GPU unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
break;
-#endif
}
HW_DMA2_CHCR &= SWAP32(~0x01000000);
GPUOTCDMA_INT(16);
return;
}
-#ifdef PSXDMA_LOG
else {
// Unknown option
- PSXDMA_LOG("*** DMA6 OT - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
+ log_unhandled("*** DMA6 OT - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
}
-#endif
HW_DMA6_CHCR &= SWAP32(~0x01000000);
DMA_INTERRUPT(6);