setup spu r8 handlers

[pcsx_rearmed.git] / libpcsxcore / psxhw.c

diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
index fb365c0..60ff6c4 100644 (file)
--- a/libpcsxcore/psxhw.c
+++ b/libpcsxcore/psxhw.c
@@ -120,8 +120,11 @@ u8 psxHwRead8(u32 add) {
                        log_unhandled("unhandled r8  %08x @%08x\n", add, psxRegs.pc);
                        // falthrough
                default:
-                       if (0x1f801c00 <= add && add < 0x1f802000)
-                               log_unhandled("spu r8 %02x @%08x\n", add, psxRegs.pc);
+                       if (0x1f801c00 <= add && add < 0x1f802000) {
+                               u16 val = SPU_readRegister(add & ~1, psxRegs.cycle);
+                               hard = (add & 1) ? val >> 8 : val;
+                               break;
+                       }
                        hard = psxHu8(add); 
 #ifdef PSXHW_LOG
                        PSXHW_LOG("*Unkwnown 8bit read at address %x\n", add);
@@ -253,7 +256,7 @@ u16 psxHwRead16(u32 add) {
                        // falthrough
                default:
                        if (0x1f801c00 <= add && add < 0x1f802000)
-                               return SPU_readRegister(add);
+                               return SPU_readRegister(add, psxRegs.cycle);
                        hard = psxHu16(add);
 #ifdef PSXHW_LOG
                        PSXHW_LOG("*Unkwnown 16bit read at address %x\n", add);
@@ -411,8 +414,8 @@ u32 psxHwRead32(u32 add) {
                        // falthrough
                default:
                        if (0x1f801c00 <= add && add < 0x1f802000) {
-                               hard = SPU_readRegister(add);
-                               hard |= SPU_readRegister(add + 2) << 16;
+                               hard = SPU_readRegister(add, psxRegs.cycle);
+                               hard |= SPU_readRegister(add + 2, psxRegs.cycle) << 16;
                                return hard;
                        }
                        hard = psxHu32(add);