#include "cdrom.h"
#include "mdec.h"
#include "gte.h"
+#include "psxinterpreter.h"
R3000Acpu *psxCpu = NULL;
+#ifdef DRC_DISABLE
psxRegisters psxRegs;
+#endif
int psxInit() {
SysPrintf(_("Running PCSX Version %s (%s).\n"), PACKAGE_VERSION, __DATE__);
-#ifdef PSXREC
+#ifndef DRC_DISABLE
if (Config.Cpu == CPU_INTERPRETER) {
psxCpu = &psxInt;
} else psxCpu = &psxRec;
#else
+ Config.Cpu = CPU_INTERPRETER;
psxCpu = &psxInt;
#endif
}
void psxReset() {
- psxCpu->Reset();
-
psxMemReset();
memset(&psxRegs, 0, sizeof(psxRegs));
psxRegs.CP0.r[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
psxRegs.CP0.r[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
+ psxCpu->Reset();
+
psxHwReset();
psxBiosInit();
}
void psxException(u32 code, u32 bd) {
+ psxRegs.code = fetch(psxRegs.pc);
+
+ if (!Config.HLE && ((((psxRegs.code) >> 24) & 0xfe) == 0x4a)) {
+ // "hokuto no ken" / "Crash Bandicot 2" ...
+ // BIOS does not allow to return to GTE instructions
+ // (just skips it, supposedly because it's scheduled already)
+ // so we execute it here
+ extern void (*psxCP2[64])(void *cp2regs);
+ psxCP2[psxRegs.code & 0x3f](&psxRegs.CP2D);
+ }
+
// Set the Cause
- psxRegs.CP0.n.Cause = code;
+ psxRegs.CP0.n.Cause = (psxRegs.CP0.n.Cause & 0x300) | code;
// Set the EPC & PC
if (bd) {
#ifdef PSXCPU_LOG
PSXCPU_LOG("bd set!!!\n");
#endif
- SysPrintf("bd set!!!\n");
psxRegs.CP0.n.Cause |= 0x80000000;
psxRegs.CP0.n.EPC = (psxRegs.pc - 4);
} else
psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status &~0x3f) |
((psxRegs.CP0.n.Status & 0xf) << 2);
- if (!Config.HLE && (((PSXMu32(psxRegs.CP0.n.EPC) >> 24) & 0xfe) == 0x4a)) {
- // "hokuto no ken" / "Crash Bandicot 2" ... fix
- PSXMu32ref(psxRegs.CP0.n.EPC)&= SWAPu32(~0x02000000);
- }
-
if (Config.HLE) psxBiosException();
}
if (psxRegs.interrupt & (1 << PSXINT_CDREAD)) { // cdr read
if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDREAD].sCycle) >= psxRegs.intCycle[PSXINT_CDREAD].cycle) {
psxRegs.interrupt &= ~(1 << PSXINT_CDREAD);
- cdrReadInterrupt();
+ cdrPlaySeekReadInterrupt();
}
}
if (psxRegs.interrupt & (1 << PSXINT_GPUDMA)) { // gpu dma
spuInterrupt();
}
}
+ if (psxRegs.interrupt & (1 << PSXINT_MDECINDMA)) { // mdec in
+ if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECINDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECINDMA].cycle) {
+ psxRegs.interrupt &= ~(1 << PSXINT_MDECINDMA);
+ mdec0Interrupt();
+ }
+ }
+ if (psxRegs.interrupt & (1 << PSXINT_GPUOTCDMA)) { // gpu otc
+ if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle) {
+ psxRegs.interrupt &= ~(1 << PSXINT_GPUOTCDMA);
+ gpuotcInterrupt();
+ }
+ }
+ if (psxRegs.interrupt & (1 << PSXINT_CDRDMA)) { // cdrom
+ if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRDMA].sCycle) >= psxRegs.intCycle[PSXINT_CDRDMA].cycle) {
+ psxRegs.interrupt &= ~(1 << PSXINT_CDRDMA);
+ cdrDmaInterrupt();
+ }
+ }
+ if (psxRegs.interrupt & (1 << PSXINT_CDRLID)) { // cdr lid states
+ if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRLID].sCycle) >= psxRegs.intCycle[PSXINT_CDRLID].cycle) {
+ psxRegs.interrupt &= ~(1 << PSXINT_CDRLID);
+ cdrLidSeekInterrupt();
+ }
+ }
+ if (psxRegs.interrupt & (1 << PSXINT_SPU_UPDATE)) { // scheduled spu update
+ if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPU_UPDATE].sCycle) >= psxRegs.intCycle[PSXINT_SPU_UPDATE].cycle) {
+ psxRegs.interrupt &= ~(1 << PSXINT_SPU_UPDATE);
+ spuUpdate();
+ }
+ }
}
if (psxHu32(0x1070) & psxHu32(0x1074)) {