.global run_game /* u16 mapper, int tas_sync */
run_game:
- move.w #0x2700, sr
+ move.w #0x2700, sr
ldarg 0, 0, d7
ldarg 1, 0, d6
movea.l #0xa10000, a6
movea.l #0xc00004, a3
moveq.l #0x00, d0
move.b #0x40, d1 /* d2 is tmp */
- move.b #0xff, d3
+ move.b #0xff, d3 /* d4 is temp */
+ moveq.l #0x00, d5 /* progress cnt */
+ movea.l d0, a7
move.b d1, (0x09,a6) /* CtrlA */
move.b d0, (0x0b,a6) /* CtrlB */
move.b d0, (0x0d,a6) /* CtrlC */
move.b d0, (0x1f,a6) /* S-CtrlC */
move.b d3, (0x1b,a6) /* TxDataC */
- /* set up for vram write */
- move.l #0x40000000, (a3)
+ move.w #0xcbaf, (0xA13006) /* some scratch area */
move.l #0xff0000, a1
move.l #0x10000/4/4-1, d2
dbra d2, 0b
tst.l d6
- beq.s 0f
+ beq.s sync_hvc
movea.l #0xa10003, a0
- movea.l d0, a7
bsr sync_with_teensy /* trashes d3 */
move.l d0, (-4,a7)
+sync_hvc:
+ addq.l #1, d6 /* attempt counter */
+
+ /* set up for progress vram write (x,y - tile #) */
+ /* GFX_WRITE_VRAM_ADDR(0xc000 + (x + 64 * y) * 2) */
+ /* d = d5 + '0' - 32 + 0xB000/32 - 128 = d5 + 0x510 */
+ move.l #(0x40000003 | ((36 + 64*1) << 17)), (a3)
+ add.w #0x510, d5
+ move.w d5, (a5)
+ move.w #('/'+0x4e0), (a5)
+ move.w #('4'+0x4e0), (a5)
+
+ lea hexchars, a1
+ move.l #(0x40000003 | ((31 + 64*2) << 17)), (a3)
+ moveq.l #8-1, d5
0:
+ rol.l #4, d3
+ move.b d3, d4
+ and.l #0x0f, d4
+ move.b (d4,a1), d4
+ add.w #0x4e0, d4
+ move.w d4, (a5)
+ dbra d5, 0b
+
+ movea.l #0xc00008, a0
+ movea.l #0x3ff000, a1
+ movea.l #0xffffe0, a2
+
/* wait for active display */
moveq.l #3, d2
0:
move.w d0, (a5)
.endr
+ /* these seem stable for both 50Hz/60Hz */
+ move.l (a0), (a1)+ /* #0xff07ff09 */
+ move.l (a0), (a1)+ /* #0xff00ff11 */
+ move.l (a0), (a1)+ /* #0xff18ff1a */
+ move.l (a0), (a1)+ /* #0xff21ff23 */
+ move.l (a0), (a1)+ /* #0xff2aff28 */
+ move.l (a0), (a1)+ /* #0xff33ff34 */
+ move.l (a0), (a1)+ /* #0xff3cff3e */
+ move.l (a0), (a1)+ /* #0xff45ff47 */
+
+ /* as long as exactly 8 or more RAM writes are performed here, */
+ /* after multiple tries RAM refresh somehow eventually syncs */
+ /* after cold boot, only 50Hz syncs to always same values though, */
+ /* so values below are 50Hz */
+ move.l (a0), (a2)+ /* #0xff4eff4f */
+ move.l (a0), (a2)+ /* #0xff58ff59 */
+ move.l (a0), (a2)+ /* #0xff60ff62 */
+ move.l (a0), (a2)+ /* #0xff69ff6b */
+ move.l (a0), (a2)+ /* #0xff72ff74 */
+ move.l (a0), (a2)+ /* #0xff7bff7c */
+ move.l (a0), (a2)+ /* #0xff83ff85 */
+ move.l (a0), (a2)+ /* #0xff8eff8f */
+
+ sub.l #4*8, a1
+ sub.l #4*8, a2
+
+ moveq.l #1, d5
+ move.l (0x00,a1), d3
+ cmp.l #0xff07ff09, d3
+ bne.w sync_hvc
+
+ moveq.l #2, d5
+ move.l (0x04,a1), d3
+ cmp.l #0xff00ff11, d3 /* mystery value */
+ bne.w sync_hvc
+
+ moveq.l #3, d5
+ move.l (0x1c,a1), d3
+ cmp.l #0xff45ff47, d3
+ bne.w sync_hvc
+
+ btst.b #6, (0xa10001)
+ bne.s sync_hvc_50hz
+
+sync_hvc_60hz:
+ /* unable to get stable RAM between cold boots :( */
+ moveq.l #4, d5
+ move.l (0x1c,a2), d3
+ cmp.l #0xff8dff8f, d3 /* unstable */
+ beq.s sync_hvc_end
+ cmp.l #0xff8cff8e, d3 /* stable? */
+ beq.s sync_hvc_end
+ cmp.l #0xff8eff90, d3
+ beq.s sync_hvc_end
+ bra.w sync_hvc
+
+sync_hvc_50hz:
+ moveq.l #4, d5
+ move.l (0x1c,a2), d3
+ cmp.l #0xff8eff8f, d3 /* RAM */
+ bne.w sync_hvc
+
+sync_hvc_end:
movea.l d0, a0
movea.l #0xA13000, a1
jmp (a0)
run_game_r_end:
+hexchars:
+ dc.b '0','1','2','3','4','5','6','7'
+ dc.b '8','9','a','b','c','d','e','f'
+
# vim:filetype=asmM68k:ts=4:sw=4:expandtab