32x: handle FEN quirk

[picodrive.git] / pico / 32x / 32x.c

diff --git a/pico/32x/32x.c b/pico/32x/32x.c
index ed0c210..0a72ddb 100644 (file)
--- a/pico/32x/32x.c
+++ b/pico/32x/32x.c
@@ -73,9 +73,9 @@ void Pico32xStartup(void)
 
   // TODO: OOM handling
   PicoAHW |= PAHW_32X;
-  sh2_init(&msh2, 0);
+  sh2_init(&msh2, 0, &ssh2);
   msh2.irq_callback = sh2_irq_cb;
-  sh2_init(&ssh2, 1);
+  sh2_init(&ssh2, 1, &msh2);
   ssh2.irq_callback = sh2_irq_cb;
 
   PicoMemSetup32x();
@@ -85,9 +85,6 @@ void Pico32xStartup(void)
   if (!Pico.m.pal)
     Pico32x.vdp_regs[0] |= P32XV_nPAL;
 
-  PREG8(Pico32xMem->sh2_peri_regs[0], 4) =
-  PREG8(Pico32xMem->sh2_peri_regs[1], 4) = 0x84; // SCI SSR
-
   rendstatus_old = -1;
 
   emu_32x_startup();
@@ -100,6 +97,8 @@ void p32x_reset_sh2s(void)
 
   sh2_reset(&msh2);
   sh2_reset(&ssh2);
+  sh2_peripheral_reset(&msh2);
+  sh2_peripheral_reset(&ssh2);
 
   // if we don't have BIOS set, perform it's work here.
   // MSH2
@@ -156,7 +155,7 @@ void PicoPower32x(void)
   memset(&Pico32x, 0, sizeof(Pico32x));
 
   Pico32x.regs[0] = P32XS_REN|P32XS_nRES; // verified
-  Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_HBLK|P32XV_PEN;
+  Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_PEN;
   Pico32x.sh2_regs[0] = P32XS2_ADEN;
 }
 
@@ -323,8 +322,8 @@ static inline void run_sh2(SH2 *sh2, int m68k_cycles)
   pevt_log_sh2_o(sh2, EVT_RUN_START);
   sh2->state |= SH2_STATE_RUN;
   cycles = C_M68K_TO_SH2(*sh2, m68k_cycles);
-  elprintf(EL_32X, "%csh2 +run %u %d",
-    sh2->is_slave?'s':'m', sh2->m68krcycles_done, cycles);
+  elprintf(EL_32X, "%csh2 +run %u %d @%08x",
+    sh2->is_slave?'s':'m', sh2->m68krcycles_done, cycles, sh2->pc);
 
   done = sh2_execute(sh2, cycles);
 
@@ -339,7 +338,7 @@ static inline void run_sh2(SH2 *sh2, int m68k_cycles)
 // note: recursive call
 void p32x_sync_other_sh2(SH2 *sh2, unsigned int m68k_target)
 {
-  SH2 *osh2 = &sh2s[sh2->is_slave ^ 1];
+  SH2 *osh2 = sh2->other_sh2;
   int left_to_event;
   int m68k_cycles;