}
}
-// if !nested_call, must sync CPUs before calling this
-void p32x_update_irls(SH2 *active_sh2)
+void p32x_update_irls(SH2 *active_sh2, int m68k_cycles)
{
int irqs, mlvl = 0, slvl = 0;
- int m68k_cycles = 0;
int mrun, srun;
if (active_sh2 != NULL)
{
if (PicoAHW & PAHW_32X) {
Pico32x.sh2irqs |= P32XI_VRES;
- p32x_update_irls(NULL);
+ p32x_update_irls(NULL, SekCyclesDoneT2());
p32x_sh2_poll_event(&msh2, SH2_IDLE_STATES, 0);
p32x_sh2_poll_event(&ssh2, SH2_IDLE_STATES, 0);
p32x_pwm_ctl_changed();
}
Pico32x.sh2irqs |= P32XI_VINT;
- p32x_update_irls(NULL);
+ p32x_update_irls(NULL, SekCyclesDoneT2());
p32x_sh2_poll_event(&msh2, SH2_STATE_VPOLL, 0);
p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, 0);
}
SekCycleCnt = 0;
sh2s[0].m68krcycles_done = sh2s[1].m68krcycles_done = SekCycleCntT;
- p32x_update_irls(NULL);
+ p32x_update_irls(NULL, SekCycleCntT);
p32x_pwm_state_loaded();
run_events(SekCycleCntT);
}