elprintf(EL_32X, "update_irls: m %d, s %d", mlvl, slvl);
sh2_irl_irq(&msh2, mlvl);
- if (mlvl)
- p32x_poll_event(0);
sh2_irl_irq(&ssh2, slvl);
+ mlvl = mlvl ? 1 : 0;
+ slvl = slvl ? 1 : 0;
+ p32x_poll_event(mlvl | (slvl << 1), 0);
}
void Pico32xStartup(void)
Pico32x.regs[0] = 0x0082; // SH2 reset?
Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_HBLK|P32XV_PEN;
+ Pico32x.sh2_regs[0] = P32XS2_ADEN;
}
void PicoUnload32x(void)
Pico32xSwapDRAM(Pico32x.pending_fb ^ 1);
}
- p32x_poll_event(1);
+ Pico32x.sh2irqs |= P32XI_VINT;
+ p32x_update_irls();
+ p32x_poll_event(3, 1);
}
// FIXME..
// ~1463.8, but due to cache misses and slow mem
// it's much lower than that
-#define SH2_LINE_CYCLES 700
+//#define SH2_LINE_CYCLES 735
+#define CYCLES_M68K2SH2(x) ((x) * 9 / 4)
#define PICO_32X
-#define RUN_SH2S \
+#define RUN_SH2S_SIMPLE(m68k_cycles) \
if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
- sh2_execute(&msh2, SH2_LINE_CYCLES); \
+ sh2_execute(&msh2, CYCLES_M68K2SH2(m68k_cycles)); \
if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
- sh2_execute(&ssh2, SH2_LINE_CYCLES);
+ sh2_execute(&ssh2, CYCLES_M68K2SH2(m68k_cycles))
+
+#define STEP 66
+#define RUN_SH2S_LOCKSTEP(m68k_cycles) \
+{ \
+ int i; \
+ for (i = 0; i < CYCLES_M68K2SH2(m68k_cycles); i+= STEP) { \
+ sh2_execute(&msh2, STEP); \
+ sh2_execute(&ssh2, STEP); \
+ } \
+}
+
+#define RUN_SH2S RUN_SH2S_SIMPLE
+//#define RUN_SH2S RUN_SH2S_LOCKSTEP
#include "../pico_cmn.c"
void PicoFrame32x(void)
{
+ pwm_frame_smp_cnt = 0;
+
Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
- if ((Pico32x.vdp_regs[0] & 3 ) != 0) // no forced blanking
- Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no pal access
+ if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
+ Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
- p32x_poll_event(1);
+ p32x_poll_event(3, 1);
PicoFrameStart();
PicoFrameHints();
+ elprintf(EL_32X, "poll: %02x", Pico32x.emu_flags);
}
+