drc: tune invalidation

[picodrive.git] / pico / 32x / memory.c

diff --git a/pico/32x/memory.c b/pico/32x/memory.c
index 109aaf4..2ec7563 100644 (file)
--- a/pico/32x/memory.c
+++ b/pico/32x/memory.c
@@ -40,9 +40,7 @@
  */
 #include "../pico_int.h"
 #include "../memory.h"
-#ifdef DRC_SH2
 #include "../../cpu/sh2/compiler.h"
-#endif
 
 #if 0
 #undef ash2_end_run
@@ -121,8 +119,8 @@ void p32x_poll_event(int cpu_mask, int is_vdp)
 
 // SH2 faking
 //#define FAKE_SH2
-int p32x_csum_faked;
 #ifdef FAKE_SH2
+static int p32x_csum_faked;
 static const u16 comm_fakevals[] = {
   0x4d5f, 0x4f4b, // M_OK
   0x535f, 0x4f4b, // S_OK
@@ -454,8 +452,8 @@ static u32 p32x_sh2reg_read16(u32 a, int cpuid)
     case 0x00: // adapter/irq ctl
       return (r[0] & P32XS_FM) | Pico32x.sh2_regs[0] | Pico32x.sh2irq_mask[cpuid];
     case 0x04: // H count (often as comm too)
-      if (p32x_poll_detect(&sh2_poll[cpuid], a, ash2_cycles_done(), 0))
-        ash2_end_run(8);
+      if (p32x_poll_detect(&sh2_poll[cpuid], a, ash2_cycles_done(&sh2s[cpuid]), 0))
+        ash2_end_run(&sh2s[cpuid], 8);
       return Pico32x.sh2_regs[4 / 2];
     case 0x10: // DREQ len
       return r[a / 2];
@@ -469,8 +467,8 @@ static u32 p32x_sh2reg_read16(u32 a, int cpuid)
     int comreg = 1 << (a & 0x0f) / 2;
     if (Pico32x.comm_dirty_68k & comreg)
       Pico32x.comm_dirty_68k &= ~comreg;
-    else if (p32x_poll_detect(&sh2_poll[cpuid], a, ash2_cycles_done(), 0))
-      ash2_end_run(8);
+    else if (p32x_poll_detect(&sh2_poll[cpuid], a, ash2_cycles_done(&sh2s[cpuid]), 0))
+      ash2_end_run(&sh2s[cpuid], 8);
     return r[a / 2];
   }
   if ((a & 0x30) == 0x30) {
@@ -695,7 +693,7 @@ static void sh2_peripheral_write32(u32 a, u32 d, int id)
     dmac0->tcr0 &= 0xffffff;
 
     // HACK: assume 68k starts writing soon and end the timeslice
-    ash2_end_run(16);
+    ash2_end_run(&sh2s[id], 16);
 
     // DREQ is only sent after first 4 words are written.
     // we do multiple of 4 words to avoid messing up alignment
@@ -1016,8 +1014,8 @@ static u32 sh2_read8_cs0(u32 a, int id)
 
   if ((a & 0x3ff00) == 0x4100) {
     d = p32x_vdp_read16(a);
-    if (p32x_poll_detect(&sh2_poll[id], a, ash2_cycles_done(), 1))
-      ash2_end_run(8);
+    if (p32x_poll_detect(&sh2_poll[id], a, ash2_cycles_done(&sh2s[id]), 1))
+      ash2_end_run(&sh2s[id], 8);
     goto out_16to8;
   }
 
@@ -1071,8 +1069,8 @@ static u32 sh2_read16_cs0(u32 a, int id)
 
   if ((a & 0x3ff00) == 0x4100) {
     d = p32x_vdp_read16(a);
-    if (p32x_poll_detect(&sh2_poll[id], a, ash2_cycles_done(), 1))
-      ash2_end_run(8);
+    if (p32x_poll_detect(&sh2_poll[id], a, ash2_cycles_done(&sh2s[id]), 1))
+      ash2_end_run(&sh2s[id], 8);
     goto out;
   }
 
@@ -1253,11 +1251,6 @@ static int REGPARM(3) sh2_write16_da(u32 a, u32 d, int id)
 }
 
 
-typedef struct {
-  uptr addr; // stores (membase >> 1) or ((handler >> 1) | (1<<31))
-  u32 mask;
-} sh2_memmap;
-
 typedef u32 (sh2_read_handler)(u32 a, int id);
 typedef int REGPARM(3) (sh2_write_handler)(u32 a, u32 d, int id);
 
@@ -1611,23 +1604,18 @@ void PicoMemSetup32x(void)
   sh2_poll[1].flag = P32XF_SSH2POLL;
   sh2_poll[1].cyc_max = 16;
 
-#ifdef DRC_SH2
   sh2_drc_mem_setup(&msh2);
   sh2_drc_mem_setup(&ssh2);
-#endif
 }
 
-void Pico32xStateLoaded(void)
+void Pico32xMemStateLoaded(void)
 {
   bank_switch(Pico32x.regs[4 / 2]);
   Pico32xSwapDRAM((Pico32x.vdp_regs[0x0a / 2] & P32XV_FS) ^ P32XV_FS);
-  p32x_poll_event(3, 0);
-  Pico32x.dirty_pal = 1;
   memset(Pico32xMem->pwm, 0, sizeof(Pico32xMem->pwm));
-  p32x_timers_recalc();
-#ifdef DRC_SH2
+  Pico32x.dirty_pal = 1;
+
   sh2_drc_flush_all();
-#endif
 }
 
 // vim:shiftwidth=2:ts=2:expandtab