* sys reg 0004000-00040ff 1 1
* vdp reg 0004100-00041ff 5 5
* vdp pal 0004200-00043ff 5 5
- * rom 2000000-23fffff 6-15
+ * cart 2000000-23fffff 6-15
* dram/fb 4000000-401ffff 5-12 1-3
* fb ovr 4020000-403ffff
* sdram 6000000-603ffff 12 2 (cycles)
if (a == sh2->poll_addr && sh2->poll_cycles - cycles_left <= 10) {
if (sh2->poll_cnt++ > maxcnt) {
if (!(sh2->state & flags))
- elprintf(EL_32X, "%csh2 state: %02x->%02x", sh2->is_slave?'s':'m',
+ elprintf_sh2(sh2, EL_32X, "state: %02x->%02x",
sh2->state, sh2->state | flags);
sh2->state |= flags;
void p32x_sh2_poll_event(SH2 *sh2, u32 flags, u32 m68k_cycles)
{
if (sh2->state & flags) {
- elprintf(EL_32X, "%csh2 state: %02x->%02x", sh2->is_slave?'s':'m',
- sh2->state, sh2->state & ~flags);
+ elprintf_sh2(sh2, EL_32X, "state: %02x->%02x", sh2->state,
+ sh2->state & ~flags);
if (sh2->m68krcycles_done < m68k_cycles)
sh2->m68krcycles_done = m68k_cycles;
unsigned int cycles = SekCyclesDoneT();
if (cycles - msh2.m68krcycles_done > 64)
p32x_sync_sh2s(cycles);
- return ((Pico32x.sh2irqi[0] & P32XI_CMD) >> 4) | ((Pico32x.sh2irqi[1] & P32XI_CMD) >> 3);
+ goto out;
}
if ((a & 0x30) == 0x30)
case 0x02: // ignored, always 0
return;
case 0x03: // irq ctl
- if ((d & 1) != !!(Pico32x.sh2irqi[0] & P32XI_CMD)) {
- p32x_sync_sh2s(SekCyclesDoneT());
- if (d & 1)
- Pico32x.sh2irqi[0] |= P32XI_CMD;
- else
- Pico32x.sh2irqi[0] &= ~P32XI_CMD;
- p32x_update_irls(NULL, SekCyclesDoneT2());
- }
- if (!!(d & 2) != !!(Pico32x.sh2irqi[1] & P32XI_CMD)) {
- p32x_sync_sh2s(SekCyclesDoneT());
- if (d & 2)
- Pico32x.sh2irqi[1] |= P32XI_CMD;
- else
- Pico32x.sh2irqi[1] &= ~P32XI_CMD;
- p32x_update_irls(NULL, SekCyclesDoneT2());
+ if ((d ^ r[0x02 / 2]) & 3) {
+ int cycles = SekCyclesDoneT();
+ p32x_sync_sh2s(cycles);
+ r[0x02 / 2] = d & 3;
+ p32x_update_cmd_irq(NULL, cycles);
}
return;
case 0x04: // ignored, always 0
static void p32x_sh2reg_write8(u32 a, u32 d, SH2 *sh2)
{
- a &= 0xff;
+ u32 old;
+ a &= 0xff;
sh2->poll_addr = 0;
switch (a) {
Pico32x.regs[0] |= (d << 8) & P32XS_FM;
return;
case 1: // HEN/irq masks
- if ((d ^ Pico32x.sh2_regs[0]) & 0x80)
- elprintf(EL_ANOMALY|EL_32X, "HEN");
- Pico32x.sh2irq_mask[sh2->is_slave] = d & 0x8f;
+ old = Pico32x.sh2irq_mask[sh2->is_slave];
+ if ((d ^ old) & 1)
+ p32x_pwm_sync_to_sh2(sh2);
+
+ Pico32x.sh2irq_mask[sh2->is_slave] = d & 0x0f;
Pico32x.sh2_regs[0] &= ~0x80;
Pico32x.sh2_regs[0] |= d & 0x80;
- if (d & 1)
+
+ if ((d ^ old) & 1)
p32x_pwm_schedule_sh2(sh2);
- p32x_update_irls(sh2, 0);
+ if ((old ^ d) & 2)
+ p32x_update_cmd_irq(sh2, 0);
+ if ((old ^ d) & 4)
+ p32x_schedule_hint(sh2, 0);
return;
case 5: // H count
d &= 0xff;
Pico32x.regs[0] &= ~P32XS_FM;
Pico32x.regs[0] |= d & P32XS_FM;
break;
- case 0x14: Pico32x.sh2irqs &= ~P32XI_VRES; goto irls;
- case 0x16: Pico32x.sh2irqs &= ~P32XI_VINT; goto irls;
- case 0x18: Pico32x.sh2irqs &= ~P32XI_HINT; goto irls;
- case 0x1a: Pico32x.sh2irqi[sh2->is_slave] &= ~P32XI_CMD; goto irls;
+ case 0x14:
+ Pico32x.sh2irqs &= ~P32XI_VRES;
+ goto irls;
+ case 0x16:
+ Pico32x.sh2irqi[sh2->is_slave] &= ~P32XI_VINT;
+ goto irls;
+ case 0x18:
+ Pico32x.sh2irqi[sh2->is_slave] &= ~P32XI_HINT;
+ goto irls;
+ case 0x1a:
+ Pico32x.regs[2 / 2] &= ~(1 << sh2->is_slave);
+ p32x_update_cmd_irq(sh2, 0);
+ return;
case 0x1c:
- Pico32x.sh2irqs &= ~P32XI_PWM;
+ p32x_pwm_sync_to_sh2(sh2);
+ Pico32x.sh2irqi[sh2->is_slave] &= ~P32XI_PWM;
p32x_pwm_schedule_sh2(sh2);
goto irls;
}
// read8
static u32 sh2_read8_unmapped(u32 a, SH2 *sh2)
{
- elprintf(EL_UIO, "%csh2 unmapped r8 [%08x] %02x @%06x",
- sh2->is_slave ? 's' : 'm', a, 0, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32X, "unmapped r8 [%08x] %02x @%06x",
+ a, 0, sh2_pc(sh2));
return 0;
}
{
u32 d = 0;
+ sh2_burn_cycles(sh2, 1*2);
+
// 0x3ff00 is veridied
if ((a & 0x3ff00) == 0x4000) {
d = p32x_sh2reg_read16(a, sh2);
else
d >>= 8;
- elprintf(EL_32X, "%csh2 r8 [%08x] %02x @%06x",
- sh2->is_slave ? 's' : 'm', a, d, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32X, "r8 [%08x] %02x @%06x",
+ a, d, sh2_pc(sh2));
return d;
}
// read16
static u32 sh2_read16_unmapped(u32 a, SH2 *sh2)
{
- elprintf(EL_UIO, "%csh2 unmapped r16 [%08x] %04x @%06x",
- sh2->is_slave ? 's' : 'm', a, 0, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32X, "unmapped r16 [%08x] %04x @%06x",
+ a, 0, sh2_pc(sh2));
return 0;
}
{
u32 d = 0;
+ sh2_burn_cycles(sh2, 1*2);
+
if ((a & 0x3ff00) == 0x4000) {
d = p32x_sh2reg_read16(a, sh2);
if (!(EL_LOGMASK & EL_PWM) && (a & 0x30) == 0x30) // hide PWM
return sh2_read16_unmapped(a, sh2);
out:
- elprintf(EL_32X, "%csh2 r16 [%08x] %04x @%06x",
- sh2->is_slave ? 's' : 'm', a, d, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32X, "r16 [%08x] %04x @%06x",
+ a, d, sh2_pc(sh2));
return d;
}
// write8
static void REGPARM(3) sh2_write8_unmapped(u32 a, u32 d, SH2 *sh2)
{
- elprintf(EL_UIO, "%csh2 unmapped w8 [%08x] %02x @%06x",
- sh2->is_slave ? 's' : 'm', a, d & 0xff, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32X, "unmapped w8 [%08x] %02x @%06x",
+ a, d & 0xff, sh2_pc(sh2));
}
static void REGPARM(3) sh2_write8_cs0(u32 a, u32 d, SH2 *sh2)
{
- elprintf(EL_32X, "%csh2 w8 [%08x] %02x @%06x",
- sh2->is_slave ? 's' : 'm', a, d & 0xff, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32X, "w8 [%08x] %02x @%06x",
+ a, d & 0xff, sh2_pc(sh2));
if (Pico32x.regs[0] & P32XS_FM) {
if ((a & 0x3ff00) == 0x4100) {
Pico32xMem->sdram[a1 ^ 1] = d;
}
+static void REGPARM(3) sh2_write8_sdram_wt(u32 a, u32 d, SH2 *sh2)
+{
+ // xmen sync hack..
+ if (a < 0x26000200)
+ sh2_end_run(sh2, 32);
+
+ sh2_write8_sdram(a, d, sh2);
+}
+
static void REGPARM(3) sh2_write8_da(u32 a, u32 d, SH2 *sh2)
{
u32 a1 = a & 0xfff;
// write16
static void REGPARM(3) sh2_write16_unmapped(u32 a, u32 d, SH2 *sh2)
{
- elprintf(EL_UIO, "%csh2 unmapped w16 [%08x] %04x @%06x",
- sh2->is_slave ? 's' : 'm', a, d & 0xffff, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32X, "unmapped w16 [%08x] %04x @%06x",
+ a, d & 0xffff, sh2_pc(sh2));
}
static void REGPARM(3) sh2_write16_cs0(u32 a, u32 d, SH2 *sh2)
{
if (((EL_LOGMASK & EL_PWM) || (a & 0x30) != 0x30)) // hide PWM
- elprintf(EL_32X, "%csh2 w16 [%08x] %04x @%06x",
- sh2->is_slave ? 's' : 'm', a, d & 0xffff, sh2_pc(sh2));
+ elprintf_sh2(sh2, EL_32X, "w16 [%08x] %04x @%06x",
+ a, d & 0xffff, sh2_pc(sh2));
if (Pico32x.regs[0] & P32XS_FM) {
if ((a & 0x3ff00) == 0x4100) {
// CS3 - SDRAM
sh2_read8_map[0x06/2].addr = sh2_read8_map[0x26/2].addr =
sh2_read16_map[0x06/2].addr = sh2_read16_map[0x26/2].addr = MAP_MEMORY(Pico32xMem->sdram);
- sh2_write8_map[0x06/2] = sh2_write8_map[0x26/2] = sh2_write8_sdram;
+ sh2_write8_map[0x06/2] = sh2_write8_sdram;
+ sh2_write8_map[0x26/2] = sh2_write8_sdram_wt;
sh2_write16_map[0x06/2] = sh2_write16_map[0x26/2] = sh2_write16_sdram;
sh2_read8_map[0x06/2].mask = sh2_read8_map[0x26/2].mask =
sh2_read16_map[0x06/2].mask = sh2_read16_map[0x26/2].mask = 0x03ffff;