case 3: // irq ctl
if ((d & 1) && !(Pico32x.sh2irqi[0] & P32XI_CMD)) {
Pico32x.sh2irqi[0] |= P32XI_CMD;
- p32x_update_irls();
+ p32x_update_irls(0);
SekEndRun(16);
}
if ((d & 2) && !(Pico32x.sh2irqi[1] & P32XI_CMD)) {
Pico32x.sh2irqi[1] |= P32XI_CMD;
- p32x_update_irls();
+ p32x_update_irls(0);
SekEndRun(16);
}
return;
Pico32x.sh2irq_mask[cpuid] = d & 0x8f;
Pico32x.sh2_regs[0] &= ~0x80;
Pico32x.sh2_regs[0] |= d & 0x80;
- p32x_update_irls();
+ p32x_update_irls(1);
return;
case 5: // H count
Pico32x.sh2_regs[4 / 2] = d & 0xff;
return;
irls:
- p32x_update_irls();
+ p32x_update_irls(1);
}
// ------------------------------------------------------------------
if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s))
return Pico32xMem->sh2_rom_s[a ^ 1];
- if ((a & 0x3ff00) == 0x4200) {
+ if ((a & 0x3fe00) == 0x4200) {
d = Pico32xMem->pal[(a & 0x1ff) / 2];
goto out_16to8;
}
if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s))
return *(u16 *)(Pico32xMem->sh2_rom_s + a);
- if ((a & 0x3ff00) == 0x4200) {
+ if ((a & 0x3fe00) == 0x4200) {
d = Pico32xMem->pal[(a & 0x1ff) / 2];
goto out;
}
msh2.read8_map = ssh2.read8_map = sh2_read8_map;
msh2.read16_map = ssh2.read16_map = sh2_read16_map;
- msh2.write8_tab = ssh2.write8_tab = (const void **)sh2_write8_map;
- msh2.write16_tab = ssh2.write16_tab = (const void **)sh2_write16_map;
+ msh2.write8_tab = ssh2.write8_tab = (const void **)(void *)sh2_write8_map;
+ msh2.write16_tab = ssh2.write16_tab = (const void **)(void *)sh2_write16_map;
// setup poll detector
m68k_poll.flag = P32XF_68KPOLL;
sh2_poll[0].cyc_max = 21;
sh2_poll[1].flag = P32XF_SSH2POLL;
sh2_poll[1].cyc_max = 16;
+
+#ifdef DRC_SH2
+ sh2_drc_mem_setup(&msh2);
+ sh2_drc_mem_setup(&ssh2);
+#endif
}
// vim:shiftwidth=2:expandtab