cd: fix busreq and reset

[picodrive.git] / pico / cd / memory.c

diff --git a/pico/cd/memory.c b/pico/cd/memory.c
index 1d669a2..1064b91 100644 (file)
--- a/pico/cd/memory.c
+++ b/pico/cd/memory.c
@@ -65,8 +65,8 @@ void PicoWriteS68k16_dec_m1b1(u32 a, u32 d);
 void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);\r
 #endif\r
 \r
-static void remap_prg_window(int r3);\r
-static void remap_word_ram(int r3);\r
+static void remap_prg_window(u32 r1, u32 r3);\r
+static void remap_word_ram(u32 r3);\r
 \r
 // poller detection\r
 #define POLL_LIMIT 16\r
@@ -87,12 +87,14 @@ u32 m68k_comm_check(u32 a, u32 d)
 #ifndef _ASM_CD_MEMORY_C\r
 static u32 m68k_reg_read16(u32 a)\r
 {\r
-  u32 d=0;\r
+  u32 d = 0;\r
   a &= 0x3e;\r
 \r
   switch (a) {\r
     case 0:\r
-      d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
+      // here IFL2 is always 0, just like in Gens\r
+      d = ((Pico_mcd->s68k_regs[0x33] << 13) & 0x8000)\r
+        | Pico_mcd->m.busreq;\r
       goto end;\r
     case 2:\r
       d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
@@ -157,23 +159,26 @@ void m68k_reg_write8(u32 a, u32 d)
       return;\r
     case 1:\r
       d &= 3;\r
-          elprintf(EL_CDREGS, "d m.busreq %u %u", d, Pico_mcd->m.busreq);\r
-      if (d == Pico_mcd->m.busreq)\r
+      dold = Pico_mcd->m.busreq;\r
+      if (!(d & 1))\r
+        d |= 2; // verified: can't release bus on reset\r
+      if (dold == d)\r
         return;\r
+\r
       pcd_sync_s68k(SekCyclesDone(), 0);\r
 \r
-      if ((Pico_mcd->m.busreq ^ d) & 1) {\r
+      if ((dold ^ d) & 1)\r
         elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));\r
-        if (!(d & 1))\r
-          d |= 2; // verified: reset also gives bus\r
-        else {\r
-          elprintf(EL_CDREGS, "m68k: resetting s68k");\r
-          SekResetS68k();\r
-        }\r
+      if (!(d & 1))\r
+        Pico_mcd->m.state_flags |= PCD_ST_S68K_RST;\r
+      else if (d == 1 && (Pico_mcd->m.state_flags & PCD_ST_S68K_RST)) {\r
+        Pico_mcd->m.state_flags &= ~PCD_ST_S68K_RST;\r
+        elprintf(EL_CDREGS, "m68k: resetting s68k");\r
+        SekResetS68k();\r
       }\r
-      if ((Pico_mcd->m.busreq ^ d) & 2) {\r
+      if ((dold ^ d) & 2) {\r
         elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);\r
-        remap_prg_window(Pico_mcd->s68k_regs[3]);\r
+        remap_prg_window(d, Pico_mcd->s68k_regs[3]);\r
       }\r
       Pico_mcd->m.busreq = d;\r
       return;\r
@@ -187,7 +192,7 @@ void m68k_reg_write8(u32 a, u32 d)
       if ((d ^ dold) & 0xc0) {\r
         elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i",\r
           (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
-        remap_prg_window(d);\r
+        remap_prg_window(Pico_mcd->m.busreq, d);\r
       }\r
 \r
       // 2M mode state is tracked regardless of current mode\r
@@ -953,11 +958,11 @@ static const void *s68k_dec_write16[2][4] = {
 \r
 // -----------------------------------------------------------------\r
 \r
-static void remap_prg_window(int r3)\r
+static void remap_prg_window(u32 r1, u32 r3)\r
 {\r
   // PRG RAM\r
-  if (Pico_mcd->m.busreq & 2) {\r
-    void *bank = Pico_mcd->prg_ram_b[r3 >> 6];\r
+  if (r1 & 2) {\r
+    void *bank = Pico_mcd->prg_ram_b[(r3 >> 6) & 3];\r
     cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);\r
   }\r
   else {\r
@@ -965,7 +970,7 @@ static void remap_prg_window(int r3)
   }\r
 }\r
 \r
-static void remap_word_ram(int r3)\r
+static void remap_word_ram(u32 r3)\r
 {\r
   void *bank;\r
 \r
@@ -1016,13 +1021,13 @@ static void remap_word_ram(int r3)
 \r
 void pcd_state_loaded_mem(void)\r
 {\r
-  int r3 = Pico_mcd->s68k_regs[3];\r
+  u32 r3 = Pico_mcd->s68k_regs[3];\r
 \r
   /* after load events */\r
   if (r3 & 4) // 1M mode?\r
     wram_2M_to_1M(Pico_mcd->word_ram2M);\r
   remap_word_ram(r3);\r
-  remap_prg_window(r3);\r
+  remap_prg_window(Pico_mcd->m.busreq, r3);\r
   Pico_mcd->m.dmna_ret_2m &= 3;\r
 \r
   // restore hint vector\r