-// Memory I/O handlers for Sega/Mega CD.\r
-// (c) Copyright 2007-2009, Grazvydas "notaz" Ignotas\r
+/*\r
+ * Memory I/O handlers for Sega/Mega CD.\r
+ * (C) notaz, 2007-2009\r
+ *\r
+ * This work is licensed under the terms of MAME license.\r
+ * See COPYING file in the top-level directory.\r
+ */\r
\r
#include "../pico_int.h"\r
#include "../memory.h"\r
#include "gfx_cd.h"\r
#include "pcm.h"\r
\r
-unsigned long s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];\r
-unsigned long s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];\r
-unsigned long s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];\r
-unsigned long s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];\r
+uptr s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];\r
+uptr s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];\r
+uptr s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];\r
+uptr s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];\r
\r
MAKE_68K_READ8(s68k_read8, s68k_read8_map)\r
MAKE_68K_READ16(s68k_read16, s68k_read16_map)\r
case 0xA:\r
elprintf(EL_UIO, "m68k FIXME: reserved read");\r
goto end;\r
- case 0xC:\r
- d = Pico_mcd->m.timer_stopwatch >> 16;\r
+ case 0xC: // 384 cycle stopwatch timer\r
+ // ugh..\r
+ d = pcd_cycles_m68k_to_s68k(SekCyclesDone());\r
+ d = (d - Pico_mcd->m.stopwatch_base_c) / 384;\r
+ d &= 0x0fff;\r
elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);\r
goto end;\r
}\r
case 8:\r
return Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
case 0xC:\r
- d = Pico_mcd->m.timer_stopwatch >> 16;\r
+ d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c;\r
+ d /= 384;\r
+ d &= 0x0fff;\r
elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);\r
return d;\r
case 0x30:\r
elprintf(EL_CDREGS, "s68k set CDC dma addr");\r
break;\r
case 0xc:\r
- case 0xd:\r
- elprintf(EL_CDREGS, "s68k set stopwatch timer");\r
- Pico_mcd->m.timer_stopwatch = 0;\r
+ case 0xd: // 384 cycle stopwatch timer\r
+ elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d);\r
+ // does this also reset internal 384 cycle counter?\r
+ Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();\r
return;\r
case 0xe:\r
Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r
return;\r
- case 0x31:\r
- elprintf(EL_CDREGS, "s68k set int3 timer: %02x", d);\r
- Pico_mcd->m.timer_int3 = (d & 0xff) << 16;\r
+ case 0x31: // 384 cycle int3 timer\r
+ d &= 0xff;\r
+ elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);\r
+ Pico_mcd->s68k_regs[a] = (u8) d;\r
+ if (d) // d or d+1??\r
+ pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384);\r
+ else\r
+ pcd_event_schedule(0, PCD_EVENT_TIMER3, 0);\r
break;\r
case 0x33: // IRQ mask\r
- elprintf(EL_CDREGS, "s68k irq mask: %02x", d);\r
- if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r
- CDD_Export_Status();\r
+ elprintf(EL_CDREGS|EL_CD, "s68k irq mask: %02x", d);\r
+ d &= 0x7e;\r
+ if ((d ^ Pico_mcd->s68k_regs[0x33]) & d & PCDS_IEN4) {\r
+ if (Pico_mcd->s68k_regs[0x37] & 4)\r
+ CDD_Export_Status();\r
}\r
break;\r
case 0x34: // fader\r
if (!(r3 & 4))\r
{\r
for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x200000;\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x200000;\r
}\r
else\r
{\r
for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;\r
for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)\r
- PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;\r
+ PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;\r
}\r
#endif\r
}\r
\r
-void PicoMemStateLoaded(void)\r
+void pcd_state_loaded_mem(void)\r
{\r
int r3 = Pico_mcd->s68k_regs[3];\r
\r
// M68k\r
// by default, point everything to fitst 64k of ROM (BIOS)\r
for (i = 0; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
// now real ROM (BIOS)\r
for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;\r
// .. and RAM\r
for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
// S68k\r
// PRG RAM is default\r
for (i = 0; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r
+ PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r
// real PRG RAM\r
for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)\r
- PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram;\r
+ PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram;\r
// WORD RAM 2M area\r
for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)\r
- PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000;\r
+ PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x80000;\r
// remap_word_ram() will setup word ram for both\r
}\r
#endif\r
}\r
#endif // EMU_M68K\r
\r
+// vim:shiftwidth=2:ts=2:expandtab\r