-// Memory I/O handlers for Sega/Mega CD.\r
-// (c) Copyright 2007-2009, Grazvydas "notaz" Ignotas\r
+/*\r
+ * Memory I/O handlers for Sega/Mega CD.\r
+ * (C) notaz, 2007-2009\r
+ *\r
+ * This work is licensed under the terms of MAME license.\r
+ * See COPYING file in the top-level directory.\r
+ */\r
\r
#include "../pico_int.h"\r
#include "../memory.h"\r
#include "gfx_cd.h"\r
#include "pcm.h"\r
\r
-unsigned long s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];\r
-unsigned long s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];\r
-unsigned long s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];\r
-unsigned long s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];\r
+uptr s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];\r
+uptr s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];\r
+uptr s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];\r
+uptr s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];\r
\r
MAKE_68K_READ8(s68k_read8, s68k_read8_map)\r
MAKE_68K_READ16(s68k_read16, s68k_read16_map)\r
\r
// -----------------------------------------------------------------\r
\r
+// provided by ASM code:\r
+#ifdef _ASM_CD_MEMORY_C\r
+u32 PicoReadM68k8_io(u32 a);\r
+u32 PicoReadM68k16_io(u32 a);\r
+void PicoWriteM68k8_io(u32 a, u32 d);\r
+void PicoWriteM68k16_io(u32 a, u32 d);\r
+\r
+u32 PicoReadS68k8_pr(u32 a);\r
+u32 PicoReadS68k16_pr(u32 a);\r
+void PicoWriteS68k8_pr(u32 a, u32 d);\r
+void PicoWriteS68k16_pr(u32 a, u32 d);\r
+\r
+u32 PicoReadM68k8_cell0(u32 a);\r
+u32 PicoReadM68k8_cell1(u32 a);\r
+u32 PicoReadM68k16_cell0(u32 a);\r
+u32 PicoReadM68k16_cell1(u32 a);\r
+void PicoWriteM68k8_cell0(u32 a, u32 d);\r
+void PicoWriteM68k8_cell1(u32 a, u32 d);\r
+void PicoWriteM68k16_cell0(u32 a, u32 d);\r
+void PicoWriteM68k16_cell1(u32 a, u32 d);\r
+\r
+u32 PicoReadS68k8_dec0(u32 a);\r
+u32 PicoReadS68k8_dec1(u32 a);\r
+u32 PicoReadS68k16_dec0(u32 a);\r
+u32 PicoReadS68k16_dec1(u32 a);\r
+void PicoWriteS68k8_dec_m0b0(u32 a, u32 d);\r
+void PicoWriteS68k8_dec_m1b0(u32 a, u32 d);\r
+void PicoWriteS68k8_dec_m2b0(u32 a, u32 d);\r
+void PicoWriteS68k8_dec_m0b1(u32 a, u32 d);\r
+void PicoWriteS68k8_dec_m1b1(u32 a, u32 d);\r
+void PicoWriteS68k8_dec_m2b1(u32 a, u32 d);\r
+void PicoWriteS68k16_dec_m0b0(u32 a, u32 d);\r
+void PicoWriteS68k16_dec_m1b0(u32 a, u32 d);\r
+void PicoWriteS68k16_dec_m2b0(u32 a, u32 d);\r
+void PicoWriteS68k16_dec_m0b1(u32 a, u32 d);\r
+void PicoWriteS68k16_dec_m1b1(u32 a, u32 d);\r
+void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);\r
+#endif\r
+\r
+static void remap_prg_window(void);\r
+static void remap_word_ram(int r3);\r
+\r
// poller detection\r
#define POLL_LIMIT 16\r
#define POLL_CYCLES 124\r
unsigned int s68k_poll_adclk, s68k_poll_cnt;\r
\r
+void m68k_comm_check(u32 a)\r
+{\r
+ pcd_sync_s68k(SekCyclesDone());\r
+ /*if (Pico_mcd->m.m68k_comm_dirty & (1 << a/2)) {\r
+ Pico_mcd->m.m68k_comm_dirty &= ~(1 << a/2);\r
+ Pico_mcd->m.m68k_poll_a = Pico_mcd->m.m68k_poll_cnt = 0;\r
+ return;\r
+ }\r
+ if (a != Pico_mcd->m.m68k_poll_a) {\r
+ Pico_mcd->m.m68k_poll_a = a;\r
+ Pico_mcd->m.m68k_poll_cnt = 0;\r
+ return;\r
+ }\r
+ if (++Pico_mcd->m.m68k_poll_cnt > 5)\r
+ SekCyclesBurnRun(122);\r
+\r
+ elprintf(EL_CDPOLL, "m68k poll [%02x] %d %u", a,\r
+ Pico_mcd->m.m68k_poll_cnt, SekCyclesDone());*/\r
+}\r
+\r
#ifndef _ASM_CD_MEMORY_C\r
static u32 m68k_reg_read16(u32 a)\r
{\r
d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
goto end;\r
case 2:\r
+ m68k_comm_check(a);\r
d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);\r
goto end;\r
case 0xA:\r
elprintf(EL_UIO, "m68k FIXME: reserved read");\r
goto end;\r
- case 0xC:\r
- d = Pico_mcd->m.timer_stopwatch >> 16;\r
+ case 0xC: // 384 cycle stopwatch timer\r
+ // ugh..\r
+ d = pcd_cycles_m68k_to_s68k(SekCyclesDone());\r
+ d = (d - Pico_mcd->m.stopwatch_base_c) / 384;\r
+ d &= 0x0fff;\r
elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);\r
goto end;\r
}\r
\r
if (a < 0x30) {\r
// comm flag/cmd/status (0xE-0x2F)\r
+ m68k_comm_check(a);\r
d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];\r
goto end;\r
}\r
u32 dold;\r
a &= 0x3f;\r
\r
+ Pico_mcd->m.m68k_poll_a = 0;\r
+\r
switch (a) {\r
case 0:\r
d &= 1;\r
return;\r
case 1:\r
d &= 3;\r
- if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset\r
- if ( (Pico_mcd->m.busreq&1) != (d&1)) elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));\r
- if ( (Pico_mcd->m.busreq&2) != (d&2)) elprintf(EL_INTSW, "m68k: s68k brq %i", (d&2)>>1);\r
- if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {\r
- SekResetS68k(); // S68k comes out of RESET or BRQ state\r
- Pico_mcd->m.state_flags&=~1;\r
- elprintf(EL_CDREGS, "m68k: resetting s68k, cycles=%i", SekCyclesLeft);\r
+ elprintf(EL_CDREGS, "d m.busreq %u %u", d, Pico_mcd->m.busreq);\r
+ if (d == Pico_mcd->m.busreq)\r
+ return;\r
+ pcd_sync_s68k(SekCyclesDone());\r
+\r
+ if ((Pico_mcd->m.busreq ^ d) & 1) {\r
+ elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));\r
+ if (!(d & 1))\r
+ d |= 2; // verified: reset also gives bus\r
+ else {\r
+ elprintf(EL_CDREGS, "m68k: resetting s68k");\r
+ SekResetS68k();\r
+ }\r
+ }\r
+ if ((Pico_mcd->m.busreq ^ d) & 2) {\r
+ elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);\r
+ remap_prg_window();\r
}\r
- if (!(d & 1))\r
- d |= 2; // verified: reset also gives bus\r
- if ((d ^ Pico_mcd->m.busreq) & 2)\r
- PicoMemRemapCD(Pico_mcd->s68k_regs[3]);\r
Pico_mcd->m.busreq = d;\r
return;\r
case 2:\r
Pico_mcd->s68k_regs[3] = (d & 0xc2) | (dold & 0x1f);\r
if ((d ^ dold) & 0xc0) {\r
elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
- PicoMemRemapCD(Pico_mcd->s68k_regs[3]);\r
+ remap_prg_window();\r
}\r
#ifdef USE_POLL_DETECT\r
if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {\r
case 0xf:\r
d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)\r
case 0xe:\r
- //dprintf("m68k: comm flag: %02x", d);\r
- Pico_mcd->s68k_regs[0xe] = d;\r
+ if (d != Pico_mcd->s68k_regs[0xe]) {\r
+ pcd_sync_s68k(SekCyclesDone());\r
+ Pico_mcd->s68k_regs[0xe] = d;\r
+ }\r
#ifdef USE_POLL_DETECT\r
if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {\r
SekSetStopS68k(0); s68k_poll_adclk = 0;\r
case 8:\r
return Read_CDC_Host(1); // Gens returns 0 here on byte reads\r
case 0xC:\r
- d = Pico_mcd->m.timer_stopwatch >> 16;\r
+ d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c;\r
+ d /= 384;\r
+ d &= 0x0fff;\r
elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);\r
return d;\r
case 0x30:\r
d |= dold & 0xc2;\r
if (d & 4)\r
{\r
- if ((d ^ dold) & 5) {\r
+ if ((d ^ dold) & 0x1d) {\r
d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit\r
- PicoMemRemapCD(d);\r
+ remap_word_ram(d);\r
}\r
-#ifdef _ASM_CD_MEMORY_C\r
- if ((d ^ dold) & 0x1d)\r
- PicoMemResetCDdecode(d);\r
-#endif\r
if (!(dold & 4)) {\r
elprintf(EL_CDREG3, "wram mode 2M->1M");\r
wram_2M_to_1M(Pico_mcd->word_ram2M);\r
d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode\r
}\r
wram_1M_to_2M(Pico_mcd->word_ram2M);\r
- PicoMemRemapCD(d);\r
+ remap_word_ram(d);\r
}\r
// s68k can only set RET, writing 0 has no effect\r
else if ((dold ^ d) & d & 1) { // RET being set\r
elprintf(EL_CDREGS, "s68k set CDC dma addr");\r
break;\r
case 0xc:\r
- case 0xd:\r
- elprintf(EL_CDREGS, "s68k set stopwatch timer");\r
- Pico_mcd->m.timer_stopwatch = 0;\r
+ case 0xd: // 384 cycle stopwatch timer\r
+ elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d);\r
+ // does this also reset internal 384 cycle counter?\r
+ Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();\r
return;\r
case 0xe:\r
- Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r
- return;\r
- case 0x31:\r
- elprintf(EL_CDREGS, "s68k set int3 timer: %02x", d);\r
- Pico_mcd->m.timer_int3 = (d & 0xff) << 16;\r
+ d = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r
+ break;\r
+ case 0x31: // 384 cycle int3 timer\r
+ d &= 0xff;\r
+ elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);\r
+ Pico_mcd->s68k_regs[a] = (u8) d;\r
+ if (d) // d or d+1??\r
+ pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384);\r
+ else\r
+ pcd_event_schedule(0, PCD_EVENT_TIMER3, 0);\r
break;\r
case 0x33: // IRQ mask\r
- elprintf(EL_CDREGS, "s68k irq mask: %02x", d);\r
- if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {\r
- CDD_Export_Status();\r
+ elprintf(EL_CDREGS|EL_CD, "s68k irq mask: %02x", d);\r
+ d &= 0x7e;\r
+ if ((d ^ Pico_mcd->s68k_regs[0x33]) & d & PCDS_IEN4) {\r
+ if (Pico_mcd->s68k_regs[0x37] & 4)\r
+ CDD_Export_Status();\r
}\r
break;\r
case 0x34: // fader\r
return;\r
}\r
\r
+ if (a < 0x30)\r
+ Pico_mcd->m.m68k_comm_dirty |= (1 << a/2);\r
+\r
Pico_mcd->s68k_regs[a] = (u8) d;\r
}\r
\r
\r
#ifndef _ASM_CD_MEMORY_C\r
#include "cell_map.c"\r
-#endif\r
\r
// WORD RAM, cell aranged area (220000 - 23ffff)\r
-static u32 PicoReadM68k8_cell(u32 a)\r
+static u32 PicoReadM68k8_cell0(u32 a)\r
{\r
- int bank = Pico_mcd->s68k_regs[3] & 1;\r
a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged\r
- return Pico_mcd->word_ram1M[bank][a ^ 1];\r
+ return Pico_mcd->word_ram1M[0][a ^ 1];\r
}\r
\r
-static u32 PicoReadM68k16_cell(u32 a)\r
+static u32 PicoReadM68k8_cell1(u32 a)\r
+{\r
+ a = (a&3) | (cell_map(a >> 2) << 2);\r
+ return Pico_mcd->word_ram1M[1][a ^ 1];\r
+}\r
+\r
+static u32 PicoReadM68k16_cell0(u32 a)\r
{\r
- int bank = Pico_mcd->s68k_regs[3] & 1;\r
a = (a&2) | (cell_map(a >> 2) << 2);\r
- return *(u16 *)(Pico_mcd->word_ram1M[bank] + a);\r
+ return *(u16 *)(Pico_mcd->word_ram1M[0] + a);\r
}\r
\r
-static void PicoWriteM68k8_cell(u32 a, u32 d)\r
+static u32 PicoReadM68k16_cell1(u32 a)\r
+{\r
+ a = (a&2) | (cell_map(a >> 2) << 2);\r
+ return *(u16 *)(Pico_mcd->word_ram1M[1] + a);\r
+}\r
+\r
+static void PicoWriteM68k8_cell0(u32 a, u32 d)\r
{\r
- int bank = Pico_mcd->s68k_regs[3] & 1;\r
a = (a&3) | (cell_map(a >> 2) << 2);\r
- Pico_mcd->word_ram1M[bank][a ^ 1] = d;\r
+ Pico_mcd->word_ram1M[0][a ^ 1] = d;\r
}\r
\r
-static void PicoWriteM68k16_cell(u32 a, u32 d)\r
+static void PicoWriteM68k8_cell1(u32 a, u32 d)\r
{\r
- int bank = Pico_mcd->s68k_regs[3] & 1;\r
a = (a&3) | (cell_map(a >> 2) << 2);\r
- *(u16 *)(Pico_mcd->word_ram1M[bank] + a) = d;\r
+ Pico_mcd->word_ram1M[1][a ^ 1] = d;\r
}\r
\r
+static void PicoWriteM68k16_cell0(u32 a, u32 d)\r
+{\r
+ a = (a&3) | (cell_map(a >> 2) << 2);\r
+ *(u16 *)(Pico_mcd->word_ram1M[0] + a) = d;\r
+}\r
+\r
+static void PicoWriteM68k16_cell1(u32 a, u32 d)\r
+{\r
+ a = (a&3) | (cell_map(a >> 2) << 2);\r
+ *(u16 *)(Pico_mcd->word_ram1M[1] + a) = d;\r
+}\r
+#endif\r
+\r
// RAM cart (40000 - 7fffff, optional)\r
static u32 PicoReadM68k8_ramc(u32 a)\r
{\r
}\r
\r
// IO/control/cd registers (a10000 - ...)\r
+#ifndef _ASM_CD_MEMORY_C\r
static u32 PicoReadM68k8_io(u32 a)\r
{\r
u32 d;\r
\r
PicoWrite16_io(a, d);\r
}\r
+#endif\r
\r
// -----------------------------------------------------------------\r
// Sub 68k\r
elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);\r
}\r
\r
+// PRG RAM protected range (000000 - 00ff00)?\r
+// XXX verify: ff00 or 1fe00 max?\r
+static void PicoWriteS68k8_prgwp(u32 a, u32 d)\r
+{\r
+ if (a >= (Pico_mcd->s68k_regs[2] << 8))\r
+ Pico_mcd->prg_ram[a ^ 1] = d;\r
+}\r
+\r
+static void PicoWriteS68k16_prgwp(u32 a, u32 d)\r
+{\r
+ if (a >= (Pico_mcd->s68k_regs[2] << 8))\r
+ *(u16 *)(Pico_mcd->prg_ram + a) = d;\r
+}\r
+\r
+#ifndef _ASM_CD_MEMORY_C\r
+\r
// decode (080000 - 0bffff, in 1M mode)\r
-static u32 PicoReadS68k8_dec(u32 a)\r
+static u32 PicoReadS68k8_dec0(u32 a)\r
{\r
- u32 d, bank;\r
- bank = (Pico_mcd->s68k_regs[3] & 1) ^ 1;\r
- d = Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff];\r
+ u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];\r
if (a & 1)\r
d &= 0x0f;\r
else\r
return d;\r
}\r
\r
-static u32 PicoReadS68k16_dec(u32 a)\r
+static u32 PicoReadS68k8_dec1(u32 a)\r
{\r
- u32 d, bank;\r
- bank = (Pico_mcd->s68k_regs[3] & 1) ^ 1;\r
- d = Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff];\r
+ u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];\r
+ if (a & 1)\r
+ d &= 0x0f;\r
+ else\r
+ d >>= 4;\r
+ return d;\r
+}\r
+\r
+static u32 PicoReadS68k16_dec0(u32 a)\r
+{\r
+ u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];\r
d |= d << 4;\r
d &= ~0xf0;\r
return d;\r
}\r
\r
-/* check: jaguar xj 220 (draws entire world using decode) */\r
-static void PicoWriteS68k8_dec(u32 a, u32 d)\r
+static u32 PicoReadS68k16_dec1(u32 a)\r
{\r
- u8 r3 = Pico_mcd->s68k_regs[3];\r
- u8 *pd = &Pico_mcd->word_ram1M[(r3 & 1) ^ 1][((a >> 1) ^ 1) & 0x1ffff];\r
- u8 oldmask = (a & 1) ? 0xf0 : 0x0f;\r
-\r
- r3 &= 0x18;\r
- d &= 0x0f;\r
- if (!(a & 1))\r
- d <<= 4;\r
-\r
- if (r3 == 8) {\r
- if ((!(*pd & (~oldmask))) && d)\r
- goto do_it;\r
- } else if (r3 > 8) {\r
- if (d)\r
- goto do_it;\r
- } else\r
- goto do_it;\r
-\r
- return;\r
-\r
-do_it:\r
- *pd = d | (*pd & oldmask);\r
+ u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];\r
+ d |= d << 4;\r
+ d &= ~0xf0;\r
+ return d;\r
}\r
\r
-static void PicoWriteS68k16_dec(u32 a, u32 d)\r
-{\r
- u8 r3 = Pico_mcd->s68k_regs[3];\r
- u8 *pd = &Pico_mcd->word_ram1M[(r3 & 1) ^ 1][((a >> 1) ^ 1) & 0x1ffff];\r
-\r
- //if ((a & 0x3ffff) < 0x28000) return;\r
-\r
- r3 &= 0x18;\r
- d &= 0x0f0f;\r
- d |= d >> 4;\r
-\r
- if (r3 == 8) {\r
- u8 dold = *pd;\r
- if (!(dold & 0xf0)) dold |= d & 0xf0;\r
- if (!(dold & 0x0f)) dold |= d & 0x0f;\r
- *pd = dold;\r
- } else if (r3 > 8) {\r
- u8 dold = *pd;\r
- if (!(d & 0xf0)) d |= dold & 0xf0;\r
- if (!(d & 0x0f)) d |= dold & 0x0f;\r
- *pd = d;\r
- } else {\r
- *pd = d;\r
- }\r
+/* check: jaguar xj 220 (draws entire world using decode) */\r
+#define mk_decode_w8(bank) \\r
+static void PicoWriteS68k8_dec_m0b##bank(u32 a, u32 d) \\r
+{ \\r
+ u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
+ \\r
+ if (!(a & 1)) \\r
+ *pd = (*pd & 0x0f) | (d << 4); \\r
+ else \\r
+ *pd = (*pd & 0xf0) | (d & 0x0f); \\r
+} \\r
+ \\r
+static void PicoWriteS68k8_dec_m1b##bank(u32 a, u32 d) \\r
+{ \\r
+ u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
+ u8 mask = (a & 1) ? 0x0f : 0xf0; \\r
+ \\r
+ if (!(*pd & mask) && (d & 0x0f)) /* underwrite */ \\r
+ PicoWriteS68k8_dec_m0b##bank(a, d); \\r
+} \\r
+ \\r
+static void PicoWriteS68k8_dec_m2b##bank(u32 a, u32 d) /* ...and m3? */ \\r
+{ \\r
+ if (d & 0x0f) /* overwrite */ \\r
+ PicoWriteS68k8_dec_m0b##bank(a, d); \\r
+}\r
+\r
+mk_decode_w8(0)\r
+mk_decode_w8(1)\r
+\r
+#define mk_decode_w16(bank) \\r
+static void PicoWriteS68k16_dec_m0b##bank(u32 a, u32 d) \\r
+{ \\r
+ u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
+ \\r
+ d &= 0x0f0f; \\r
+ *pd = d | (d >> 4); \\r
+} \\r
+ \\r
+static void PicoWriteS68k16_dec_m1b##bank(u32 a, u32 d) \\r
+{ \\r
+ u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
+ \\r
+ d &= 0x0f0f; /* underwrite */ \\r
+ if (!(*pd & 0xf0)) *pd |= d >> 4; \\r
+ if (!(*pd & 0x0f)) *pd |= d; \\r
+} \\r
+ \\r
+static void PicoWriteS68k16_dec_m2b##bank(u32 a, u32 d) \\r
+{ \\r
+ u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \\r
+ \\r
+ d &= 0x0f0f; /* overwrite */ \\r
+ d |= d >> 4; \\r
+ \\r
+ if (!(d & 0xf0)) d |= *pd & 0xf0; \\r
+ if (!(d & 0x0f)) d |= *pd & 0x0f; \\r
+ *pd = d; \\r
}\r
\r
+mk_decode_w16(0)\r
+mk_decode_w16(1)\r
+\r
+#endif\r
+\r
// backup RAM (fe0000 - feffff)\r
static u32 PicoReadS68k8_bram(u32 a)\r
{\r
SRam.changed = 1;\r
}\r
\r
+#ifndef _ASM_CD_MEMORY_C\r
+\r
// PCM and registers (ff0000 - ffffff)\r
static u32 PicoReadS68k8_pr(u32 a)\r
{\r
}\r
\r
// PCM\r
+ // XXX: verify: probably odd addrs only?\r
if ((a & 0x8000) == 0x0000) {\r
a &= 0x7fff;\r
if (a >= 0x2000)\r
s68k_unmapped_write16(a, d);\r
}\r
\r
-// -----------------------------------------------------------------\r
-\r
-#ifdef EMU_C68K\r
-static __inline int PicoMemBaseM68k(u32 pc)\r
-{\r
- if ((pc&0xe00000)==0xe00000)\r
- return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
-\r
- if (pc < 0x20000)\r
- return (int)Pico_mcd->bios; // Program Counter in BIOS\r
-\r
- if ((pc&0xfc0000)==0x200000)\r
- {\r
- if (!(Pico_mcd->s68k_regs[3]&4))\r
- return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram\r
- if (pc < 0x220000) {\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- return (int)Pico_mcd->word_ram1M[bank] - 0x200000;\r
- }\r
- }\r
-\r
- // Error - Program Counter is invalid\r
- elprintf(EL_ANOMALY, "m68k FIXME: unhandled jump to %06x", pc);\r
-\r
- return (int)Pico_mcd->bios;\r
-}\r
-\r
-\r
-static u32 PicoCheckPcM68k(u32 pc)\r
-{\r
- pc-=PicoCpuCM68k.membase; // Get real pc\r
- pc&=0xfffffe;\r
-\r
- PicoCpuCM68k.membase=PicoMemBaseM68k(pc);\r
-\r
- return PicoCpuCM68k.membase+pc;\r
-}\r
-\r
-\r
-static __inline int PicoMemBaseS68k(u32 pc)\r
-{\r
- if (pc < 0x80000) // PRG RAM\r
- return (int)Pico_mcd->prg_ram;\r
-\r
- if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)\r
- return (int)Pico_mcd->word_ram2M - 0x080000;\r
-\r
- if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area\r
- int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
- return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;\r
- }\r
-\r
- // Error - Program Counter is invalid\r
- elprintf(EL_ANOMALY, "s68k FIXME: unhandled jump to %06x", pc);\r
+#endif\r
\r
- return (int)Pico_mcd->prg_ram;\r
-}\r
+static const void *m68k_cell_read8[] = { PicoReadM68k8_cell0, PicoReadM68k8_cell1 };\r
+static const void *m68k_cell_read16[] = { PicoReadM68k16_cell0, PicoReadM68k16_cell1 };\r
+static const void *m68k_cell_write8[] = { PicoWriteM68k8_cell0, PicoWriteM68k8_cell1 };\r
+static const void *m68k_cell_write16[] = { PicoWriteM68k16_cell0, PicoWriteM68k16_cell1 };\r
\r
+static const void *s68k_dec_read8[] = { PicoReadS68k8_dec0, PicoReadS68k8_dec1 };\r
+static const void *s68k_dec_read16[] = { PicoReadS68k16_dec0, PicoReadS68k16_dec1 };\r
\r
-static u32 PicoCheckPcS68k(u32 pc)\r
-{\r
- pc-=PicoCpuCS68k.membase; // Get real pc\r
- pc&=0xfffffe;\r
+static const void *s68k_dec_write8[2][4] = {\r
+ { PicoWriteS68k8_dec_m0b0, PicoWriteS68k8_dec_m1b0, PicoWriteS68k8_dec_m2b0, PicoWriteS68k8_dec_m2b0 },\r
+ { PicoWriteS68k8_dec_m0b1, PicoWriteS68k8_dec_m1b1, PicoWriteS68k8_dec_m2b1, PicoWriteS68k8_dec_m2b1 },\r
+};\r
\r
- PicoCpuCS68k.membase=PicoMemBaseS68k(pc);\r
+static const void *s68k_dec_write16[2][4] = {\r
+ { PicoWriteS68k16_dec_m0b0, PicoWriteS68k16_dec_m1b0, PicoWriteS68k16_dec_m2b0, PicoWriteS68k16_dec_m2b0 },\r
+ { PicoWriteS68k16_dec_m0b1, PicoWriteS68k16_dec_m1b1, PicoWriteS68k16_dec_m2b1, PicoWriteS68k16_dec_m2b1 },\r
+};\r
\r
- return PicoCpuCS68k.membase+pc;\r
-}\r
-#endif\r
+// -----------------------------------------------------------------\r
\r
-// TODO: probably split\r
-void PicoMemRemapCD(int r3)\r
+static void remap_prg_window(void)\r
{\r
- void *bank;\r
-\r
// PRG RAM\r
if (Pico_mcd->m.busreq & 2) {\r
- bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3] >> 6];\r
+ void *bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3] >> 6];\r
cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);\r
}\r
else {\r
m68k_map_unmap(0x020000, 0x03ffff);\r
}\r
+}\r
+\r
+static void remap_word_ram(int r3)\r
+{\r
+ void *bank;\r
\r
// WORD RAM\r
if (!(r3 & 4)) {\r
// TODO: handle 0x0c0000\r
}\r
else {\r
- bank = Pico_mcd->word_ram1M[r3 & 1];\r
+ int b0 = r3 & 1;\r
+ int m = (r3 & 0x18) >> 3;\r
+ bank = Pico_mcd->word_ram1M[b0];\r
cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);\r
- bank = Pico_mcd->word_ram1M[(r3 & 1) ^ 1];\r
+ bank = Pico_mcd->word_ram1M[b0 ^ 1];\r
cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);\r
// "cell arrange" on m68k\r
- cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, PicoReadM68k8_cell, 1);\r
- cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, PicoReadM68k16_cell, 1);\r
- cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, PicoWriteM68k8_cell, 1);\r
- cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, PicoWriteM68k16_cell, 1);\r
+ cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, m68k_cell_read8[b0], 1);\r
+ cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, m68k_cell_read16[b0], 1);\r
+ cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, m68k_cell_write8[b0], 1);\r
+ cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, m68k_cell_write16[b0], 1);\r
// "decode format" on s68k\r
- cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, PicoReadS68k8_dec, 1);\r
- cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, PicoReadS68k16_dec, 1);\r
- cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, PicoWriteS68k8_dec, 1);\r
- cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, PicoWriteS68k16_dec, 1);\r
+ cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, s68k_dec_read8[b0 ^ 1], 1);\r
+ cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, s68k_dec_read16[b0 ^ 1], 1);\r
+ cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1);\r
+ cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1);\r
}\r
\r
#ifdef EMU_F68K\r
if (!(r3 & 4))\r
{\r
for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x200000;\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x200000;\r
}\r
else\r
{\r
for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;\r
for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)\r
- PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;\r
+ PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;\r
}\r
#endif\r
}\r
\r
+void pcd_state_loaded_mem(void)\r
+{\r
+ int r3 = Pico_mcd->s68k_regs[3];\r
+\r
+ /* after load events */\r
+ if (r3 & 4) // 1M mode?\r
+ wram_2M_to_1M(Pico_mcd->word_ram2M);\r
+ remap_word_ram(r3);\r
+ remap_prg_window();\r
+\r
+ // restore hint vector\r
+ *(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;\r
+}\r
+\r
#ifdef EMU_M68K\r
static void m68k_mem_setup_cd(void);\r
#endif\r
// setup default main68k map\r
PicoMemSetup();\r
\r
- // PicoMemRemapCD() will set up RAMs, so not done here\r
-\r
// main68k map (BIOS mapped by PicoMemSetup()):\r
// RAM cart\r
if (PicoOpt & POPT_EN_MCD_RAMCART) {\r
cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
+ cpu68k_map_set(s68k_write8_map, 0x000000, 0x00ffff, PicoWriteS68k8_prgwp, 1);\r
+ cpu68k_map_set(s68k_write16_map, 0x000000, 0x00ffff, PicoWriteS68k16_prgwp, 1);\r
\r
// BRAM\r
cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);\r
cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1);\r
cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);\r
\r
+ // RAMs\r
+ remap_word_ram(1);\r
+\r
#ifdef EMU_C68K\r
- PicoCpuCM68k.checkpc = PicoCheckPcM68k;\r
// s68k\r
- PicoCpuCS68k.checkpc = PicoCheckPcS68k;\r
- PicoCpuCS68k.fetch8 = PicoCpuCS68k.read8 = s68k_read8;\r
- PicoCpuCS68k.fetch16 = PicoCpuCS68k.read16 = s68k_read16;\r
- PicoCpuCS68k.fetch32 = PicoCpuCS68k.read32 = s68k_read32;\r
- PicoCpuCS68k.write8 = s68k_write8;\r
- PicoCpuCS68k.write16 = s68k_write16;\r
- PicoCpuCS68k.write32 = s68k_write32;\r
+ PicoCpuCS68k.read8 = (void *)s68k_read8_map;\r
+ PicoCpuCS68k.read16 = (void *)s68k_read16_map;\r
+ PicoCpuCS68k.read32 = (void *)s68k_read16_map;\r
+ PicoCpuCS68k.write8 = (void *)s68k_write8_map;\r
+ PicoCpuCS68k.write16 = (void *)s68k_write16_map;\r
+ PicoCpuCS68k.write32 = (void *)s68k_write16_map;\r
+ PicoCpuCS68k.checkpc = NULL; /* unused */\r
+ PicoCpuCS68k.fetch8 = NULL;\r
+ PicoCpuCS68k.fetch16 = NULL;\r
+ PicoCpuCS68k.fetch32 = NULL;\r
#endif\r
#ifdef EMU_F68K\r
// s68k\r
// M68k\r
// by default, point everything to fitst 64k of ROM (BIOS)\r
for (i = 0; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
// now real ROM (BIOS)\r
for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;\r
// .. and RAM\r
for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
// S68k\r
// PRG RAM is default\r
for (i = 0; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r
+ PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));\r
// real PRG RAM\r
for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)\r
- PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram;\r
+ PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram;\r
// WORD RAM 2M area\r
for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)\r
- PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000;\r
- // PicoMemRemapCD() will setup word ram for both\r
+ PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x80000;\r
+ // remap_word_ram() will setup word ram for both\r
}\r
#endif\r
#ifdef EMU_M68K\r
if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write32(a, d); else m68k_write32(a, d);\r
}\r
\r
-// these are allowed to access RAM\r
-static unsigned int m68k_read_pcrelative_CD8 (unsigned int a)\r
-{\r
- a&=0xffffff;\r
- if(m68ki_cpu_p == &PicoCpuMS68k) {\r
- if (a < 0x80000) return *(u8 *)(Pico_mcd->prg_ram+(a^1)); // PRG Ram\r
- if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
- return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
- if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
- int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
- return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
- }\r
- elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
- } else {\r
- if((a&0xe00000)==0xe00000) return *(u8 *)(Pico.ram+((a^1)&0xffff)); // Ram\r
- if(a<0x20000) return *(u8 *)(Pico.rom+(a^1)); // Bios\r
- if((a&0xfc0000)==0x200000) { // word RAM\r
- if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
- return *(u8 *)(Pico_mcd->word_ram2M+((a^1)&0x3ffff));\r
- else if (a < 0x220000) {\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- return *(u8 *)(Pico_mcd->word_ram1M[bank]+((a^1)&0x1ffff));\r
- }\r
- }\r
- elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD8 FIXME: can't handle %06x", a);\r
- }\r
- return 0;//(u8) lastread_d;\r
-}\r
-static unsigned int m68k_read_pcrelative_CD16(unsigned int a)\r
-{\r
- a&=0xffffff;\r
- if(m68ki_cpu_p == &PicoCpuMS68k) {\r
- if (a < 0x80000) return *(u16 *)(Pico_mcd->prg_ram+(a&~1)); // PRG Ram\r
- if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
- return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
- if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
- int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
- return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
- }\r
- elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
- } else {\r
- if((a&0xe00000)==0xe00000) return *(u16 *)(Pico.ram+(a&0xfffe)); // Ram\r
- if(a<0x20000) return *(u16 *)(Pico.rom+(a&~1)); // Bios\r
- if((a&0xfc0000)==0x200000) { // word RAM\r
- if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
- return *(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe));\r
- else if (a < 0x220000) {\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- return *(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
- }\r
- }\r
- elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD16 FIXME: can't handle %06x", a);\r
- }\r
- return 0;\r
-}\r
-static unsigned int m68k_read_pcrelative_CD32(unsigned int a)\r
-{\r
- u16 *pm;\r
- a&=0xffffff;\r
- if(m68ki_cpu_p == &PicoCpuMS68k) {\r
- if (a < 0x80000) { u16 *pm=(u16 *)(Pico_mcd->prg_ram+(a&~1)); return (pm[0]<<16)|pm[1]; } // PRG Ram\r
- if ((a&0xfc0000)==0x080000 && !(Pico_mcd->s68k_regs[3]&4)) // word RAM (2M area: 080000-0bffff)\r
- { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
- if ((a&0xfe0000)==0x0c0000 && (Pico_mcd->s68k_regs[3]&4)) { // word RAM (1M area: 0c0000-0dffff)\r
- int bank = (Pico_mcd->s68k_regs[3]&1)^1;\r
- pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
- return (pm[0]<<16)|pm[1];\r
- }\r
- elprintf(EL_ANOMALY, "s68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
- } else {\r
- if((a&0xe00000)==0xe00000) { u16 *pm=(u16 *)(Pico.ram+(a&0xfffe)); return (pm[0]<<16)|pm[1]; } // Ram\r
- if(a<0x20000) { u16 *pm=(u16 *)(Pico.rom+(a&~1)); return (pm[0]<<16)|pm[1]; }\r
- if((a&0xfc0000)==0x200000) { // word RAM\r
- if(!(Pico_mcd->s68k_regs[3]&4)) // 2M?\r
- { pm=(u16 *)(Pico_mcd->word_ram2M+(a&0x3fffe)); return (pm[0]<<16)|pm[1]; }\r
- else if (a < 0x220000) {\r
- int bank = Pico_mcd->s68k_regs[3]&1;\r
- pm=(u16 *)(Pico_mcd->word_ram1M[bank]+(a&0x1fffe));\r
- return (pm[0]<<16)|pm[1];\r
- }\r
- }\r
- elprintf(EL_ANOMALY, "m68k_read_pcrelative_CD32 FIXME: can't handle %06x", a);\r
- }\r
- return 0;\r
-}\r
-\r
extern unsigned int (*pm68k_read_memory_8) (unsigned int address);\r
extern unsigned int (*pm68k_read_memory_16)(unsigned int address);\r
extern unsigned int (*pm68k_read_memory_32)(unsigned int address);\r
extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);\r
extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);\r
extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);\r
-extern unsigned int (*pm68k_read_memory_pcr_8) (unsigned int address);\r
-extern unsigned int (*pm68k_read_memory_pcr_16)(unsigned int address);\r
-extern unsigned int (*pm68k_read_memory_pcr_32)(unsigned int address);\r
\r
static void m68k_mem_setup_cd(void)\r
{\r
pm68k_write_memory_8 = PicoWriteCD8w;\r
pm68k_write_memory_16 = PicoWriteCD16w;\r
pm68k_write_memory_32 = PicoWriteCD32w;\r
- pm68k_read_memory_pcr_8 = m68k_read_pcrelative_CD8;\r
- pm68k_read_memory_pcr_16 = m68k_read_pcrelative_CD16;\r
- pm68k_read_memory_pcr_32 = m68k_read_pcrelative_CD32;\r
}\r
#endif // EMU_M68K\r
\r
+// vim:shiftwidth=2:ts=2:expandtab\r
notaz.gp2x.de / picodrive.git / blobdiff