for (i = start_addr >> shift; i <= end_addr >> shift; i++) {\r
map[i] = addr >> 1;\r
if (is_func)\r
- map[i] |= 1 << (sizeof(addr) * 8 - 1);\r
+ map[i] |= (uptr)1 << (sizeof(addr) * 8 - 1);\r
}\r
}\r
\r
else\r
{\r
z80stopCycle = SekCyclesDone();\r
- if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset)\r
+ if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset) {\r
+ pprof_start(m68k);\r
PicoSyncZ80(z80stopCycle);\r
+ pprof_end_sub(m68k);\r
+ }\r
}\r
Pico.m.z80Run = d;\r
}\r
{\r
if (d)\r
{\r
- if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run)\r
+ if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run) {\r
+ pprof_start(m68k);\r
PicoSyncZ80(SekCyclesDone());\r
+ pprof_end_sub(m68k);\r
+ }\r
YM2612ResetChip();\r
timers_reset();\r
}\r
static u32 PicoRead16_sram(u32 a)\r
{\r
u32 d;\r
- if (SRam.end >= a && a >= SRam.start && (Pico.m.sram_reg & SRR_MAPPED))\r
+ if (SRam.start <= a && a <= SRam.end && (Pico.m.sram_reg & SRR_MAPPED))\r
{\r
if (SRam.flags & SRF_EEPROM)\r
d = EEPROM_read();\r
if (xcycles >= timer_b_next_oflow) \\r
ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2\r
\r
-static u32 MEMH_FUNC ym2612_read_local_z80(void)\r
+static u32 ym2612_read_local_z80(void)\r
{\r
int xcycles = z80_cyclesDone() << 8;\r
\r
elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, timer_b_next_oflow >> 8);\r
}\r
\r
+#if defined(NO_32X) && defined(_ASM_MEMORY_C)\r
+// referenced by asm code\r
+u32 PicoRead8_32x(u32 a) { return 0; }\r
+u32 PicoRead16_32x(u32 a) { return 0; }\r
+void PicoWrite8_32x(u32 a, u32 d) {}\r
+void PicoWrite16_32x(u32 a, u32 d) {}\r
+#endif\r
+\r
// -----------------------------------------------------------------\r
// z80 memhandlers\r
\r
-static unsigned char MEMH_FUNC z80_md_vdp_read(unsigned short a)\r
+static unsigned char z80_md_vdp_read(unsigned short a)\r
{\r
// TODO?\r
elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, 0xff);\r
return 0xff;\r
}\r
\r
-static unsigned char MEMH_FUNC z80_md_bank_read(unsigned short a)\r
+static unsigned char z80_md_bank_read(unsigned short a)\r
{\r
unsigned int addr68k;\r
unsigned char ret;\r
return ret;\r
}\r
\r
-static void MEMH_FUNC z80_md_ym2612_write(unsigned int a, unsigned char data)\r
+static void z80_md_ym2612_write(unsigned int a, unsigned char data)\r
{\r
if (PicoOpt & POPT_EN_FM)\r
emustatus |= ym2612_write_local(a, data, 1) & 1;\r
}\r
\r
-static void MEMH_FUNC z80_md_vdp_br_write(unsigned int a, unsigned char data)\r
+static void z80_md_vdp_br_write(unsigned int a, unsigned char data)\r
{\r
// TODO: allow full VDP access\r
if ((a&0xfff9) == 0x7f11) // 7f11 7f13 7f15 7f17\r
elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);\r
}\r
\r
-static void MEMH_FUNC z80_md_bank_write(unsigned int a, unsigned char data)\r
+static void z80_md_bank_write(unsigned int a, unsigned char data)\r
{\r
unsigned int addr68k;\r
\r
drZ80.z80_out = z80_md_out;\r
#endif\r
#ifdef _USE_CZ80\r
- Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (UINT32)Pico.zram); // main RAM\r
- Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (UINT32)Pico.zram); // mirror\r
+ Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (FPTR)Pico.zram); // main RAM\r
+ Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (FPTR)Pico.zram); // mirror\r
Cz80_Set_INPort(&CZ80, z80_md_in);\r
Cz80_Set_OUTPort(&CZ80, z80_md_out);\r
#endif\r