-// This is part of Pico Library\r
-\r
-// (c) Copyright 2004 Dave, All rights reserved.\r
-// (c) Copyright 2006-2009 notaz, All rights reserved.\r
-// Free for non-commercial use.\r
-\r
-// For commercial use, separate licencing terms must be obtained.\r
-\r
+/*\r
+ * memory handling\r
+ * (c) Copyright Dave, 2004\r
+ * (C) notaz, 2006-2010\r
+ *\r
+ * This work is licensed under the terms of MAME license.\r
+ * See COPYING file in the top-level directory.\r
+ */\r
\r
#include "pico_int.h"\r
#include "memory.h"\r
\r
extern unsigned int lastSSRamWrite; // used by serial eeprom code\r
\r
-unsigned long m68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];\r
-unsigned long m68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];\r
-unsigned long m68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];\r
-unsigned long m68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];\r
+uptr m68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];\r
+uptr m68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];\r
+uptr m68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];\r
+uptr m68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];\r
\r
-static void xmap_set(unsigned long *map, int shift, int start_addr, int end_addr,\r
- void *func_or_mh, int is_func)\r
+static void xmap_set(uptr *map, int shift, int start_addr, int end_addr,\r
+ const void *func_or_mh, int is_func)\r
{\r
- unsigned long addr = (unsigned long)func_or_mh;\r
+#ifdef __clang__\r
+ // workaround bug (segfault) in \r
+ // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)\r
+ volatile \r
+#endif\r
+ uptr addr = (uptr)func_or_mh;\r
int mask = (1 << shift) - 1;\r
int i;\r
\r
for (i = start_addr >> shift; i <= end_addr >> shift; i++) {\r
map[i] = addr >> 1;\r
if (is_func)\r
- map[i] |= 1 << (sizeof(addr) * 8 - 1);\r
+ map[i] |= MAP_FLAG;\r
}\r
}\r
\r
-void z80_map_set(unsigned long *map, int start_addr, int end_addr,\r
- void *func_or_mh, int is_func)\r
+void z80_map_set(uptr *map, int start_addr, int end_addr,\r
+ const void *func_or_mh, int is_func)\r
{\r
xmap_set(map, Z80_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);\r
}\r
\r
-void cpu68k_map_set(unsigned long *map, int start_addr, int end_addr,\r
- void *func_or_mh, int is_func)\r
+void cpu68k_map_set(uptr *map, int start_addr, int end_addr,\r
+ const void *func_or_mh, int is_func)\r
{\r
xmap_set(map, M68K_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);\r
}\r
// more specialized/optimized function (does same as above)\r
void cpu68k_map_all_ram(int start_addr, int end_addr, void *ptr, int is_sub)\r
{\r
- unsigned long *r8map, *r16map, *w8map, *w16map;\r
- unsigned long addr = (unsigned long)ptr;\r
+ uptr *r8map, *r16map, *w8map, *w16map;\r
+ uptr addr = (uptr)ptr;\r
int shift = M68K_MEM_SHIFT;\r
int i;\r
\r
\r
void m68k_map_unmap(int start_addr, int end_addr)\r
{\r
- unsigned long addr;\r
+#ifdef __clang__\r
+ // workaround bug (segfault) in \r
+ // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)\r
+ volatile \r
+#endif\r
+ uptr addr;\r
int shift = M68K_MEM_SHIFT;\r
int i;\r
\r
- addr = (unsigned long)m68k_unmapped_read8;\r
+ addr = (uptr)m68k_unmapped_read8;\r
for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
- m68k_read8_map[i] = (addr >> 1) | (1 << 31);\r
+ m68k_read8_map[i] = (addr >> 1) | MAP_FLAG;\r
\r
- addr = (unsigned long)m68k_unmapped_read16;\r
+ addr = (uptr)m68k_unmapped_read16;\r
for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
- m68k_read16_map[i] = (addr >> 1) | (1 << 31);\r
+ m68k_read16_map[i] = (addr >> 1) | MAP_FLAG;\r
\r
- addr = (unsigned long)m68k_unmapped_write8;\r
+ addr = (uptr)m68k_unmapped_write8;\r
for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
- m68k_write8_map[i] = (addr >> 1) | (1 << 31);\r
+ m68k_write8_map[i] = (addr >> 1) | MAP_FLAG;\r
\r
- addr = (unsigned long)m68k_unmapped_write16;\r
+ addr = (uptr)m68k_unmapped_write16;\r
for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
- m68k_write16_map[i] = (addr >> 1) | (1 << 31);\r
+ m68k_write16_map[i] = (addr >> 1) | MAP_FLAG;\r
}\r
\r
MAKE_68K_READ8(m68k_read8, m68k_read8_map)\r
static int ym2612_write_local(u32 a, u32 d, int is_from_z80);\r
static void z80_mem_setup(void);\r
\r
+#ifdef _ASM_MEMORY_C\r
+u32 PicoRead8_sram(u32 a);\r
+u32 PicoRead16_sram(u32 a);\r
+#endif\r
\r
#ifdef EMU_CORE_DEBUG\r
u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};\r
#endif\r
\r
#if defined(EMU_C68K)\r
-static __inline int PicoMemBase(u32 pc)\r
+void cyclone_crashed(u32 pc, struct Cyclone *context)\r
{\r
- int membase=0;\r
+ elprintf(EL_STATUS|EL_ANOMALY, "%c68k crash detected @ %06x",\r
+ context == &PicoCpuCM68k ? 'm' : 's', pc);\r
+ context->membase = (u32)Pico.rom;\r
+ context->pc = (u32)Pico.rom + Pico.romsize;\r
+}\r
+#endif\r
\r
- if (pc<Pico.romsize+4)\r
- {\r
- membase=(int)Pico.rom; // Program Counter in Rom\r
- }\r
- else if ((pc&0xe00000)==0xe00000)\r
- {\r
- membase=(int)Pico.ram-(pc&0xff0000); // Program Counter in Ram\r
- }\r
+// -----------------------------------------------------------------\r
+// memmap helpers\r
+\r
+static u32 read_pad_3btn(int i, u32 out_bits)\r
+{\r
+ u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r
+ u32 value;\r
+\r
+ if (out_bits & 0x40) // TH\r
+ value = pad & 0x3f; // ?1CB RLDU\r
else\r
- {\r
- // Error - Program Counter is invalid\r
- membase=(int)Pico.rom;\r
- }\r
+ value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU\r
\r
- return membase;\r
+ value |= out_bits & 0x40;\r
+ return value;\r
}\r
-#endif\r
\r
-\r
-PICO_INTERNAL u32 PicoCheckPc(u32 pc)\r
+static u32 read_pad_6btn(int i, u32 out_bits)\r
{\r
- u32 ret=0;\r
-#if defined(EMU_C68K)\r
- pc-=PicoCpuCM68k.membase; // Get real pc\r
-// pc&=0xfffffe;\r
- pc&=~1;\r
- if ((pc<<8) == 0)\r
- {\r
- elprintf(EL_STATUS|EL_ANOMALY, "%i:%03i: game crash detected @ %06x\n",\r
- Pico.m.frame_count, Pico.m.scanline, SekPc);\r
- return (int)Pico.rom + Pico.romsize; // common crash condition, may happen with bad ROMs\r
+ u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r
+ int phase = Pico.m.padTHPhase[i];\r
+ u32 value;\r
+\r
+ if (phase == 2 && !(out_bits & 0x40)) {\r
+ value = (pad & 0xc0) >> 2; // ?0SA 0000\r
+ goto out;\r
+ }\r
+ else if(phase == 3) {\r
+ if (out_bits & 0x40)\r
+ return (pad & 0x30) | ((pad >> 8) & 0xf); // ?1CB MXYZ\r
+ else\r
+ return ((pad & 0xc0) >> 2) | 0x0f; // ?0SA 1111\r
+ goto out;\r
}\r
\r
- PicoCpuCM68k.membase=PicoMemBase(pc&0x00ffffff);\r
- PicoCpuCM68k.membase-=pc&0xff000000;\r
+ if (out_bits & 0x40) // TH\r
+ value = pad & 0x3f; // ?1CB RLDU\r
+ else\r
+ value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU\r
\r
- ret = PicoCpuCM68k.membase+pc;\r
-#endif\r
- return ret;\r
+out:\r
+ value |= out_bits & 0x40;\r
+ return value;\r
}\r
\r
-\r
-PICO_INTERNAL void PicoInitPc(u32 pc)\r
+static u32 read_nothing(int i, u32 out_bits)\r
{\r
- PicoCheckPc(pc);\r
+ return 0xff;\r
}\r
\r
-// -----------------------------------------------------------------\r
-// memmap helpers\r
+typedef u32 (port_read_func)(int index, u32 out_bits);\r
+\r
+static port_read_func *port_readers[3] = {\r
+ read_pad_3btn,\r
+ read_pad_3btn,\r
+ read_nothing\r
+};\r
\r
-static int PadRead(int i)\r
+static NOINLINE u32 port_read(int i)\r
{\r
- int pad,value,data_reg;\r
- pad=~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r
- data_reg=Pico.ioports[i+1];\r
+ u32 data_reg = Pico.ioports[i + 1];\r
+ u32 ctrl_reg = Pico.ioports[i + 4] | 0x80;\r
+ u32 in, out;\r
\r
- // orr the bits, which are set as output\r
- value = data_reg&(Pico.ioports[i+4]|0x80);\r
+ out = data_reg & ctrl_reg;\r
+ out |= 0x7f & ~ctrl_reg; // pull-ups\r
\r
- if (PicoOpt & POPT_6BTN_PAD)\r
- {\r
- int phase = Pico.m.padTHPhase[i];\r
-\r
- if(phase == 2 && !(data_reg&0x40)) { // TH\r
- value|=(pad&0xc0)>>2; // ?0SA 0000\r
- return value;\r
- } else if(phase == 3) {\r
- if(data_reg&0x40)\r
- value|=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ\r
- else\r
- value|=((pad&0xc0)>>2)|0x0f; // ?0SA 1111\r
- return value;\r
- }\r
- }\r
+ in = port_readers[i](i, out);\r
+\r
+ return (in & ~ctrl_reg) | (data_reg & ctrl_reg);\r
+}\r
+\r
+void PicoSetInputDevice(int port, enum input_device device)\r
+{\r
+ port_read_func *func;\r
+\r
+ if (port < 0 || port > 2)\r
+ return;\r
\r
- if(data_reg&0x40) // TH\r
- value|=(pad&0x3f); // ?1CB RLDU\r
- else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r
+ switch (device) {\r
+ case PICO_INPUT_PAD_3BTN:\r
+ func = read_pad_3btn;\r
+ break;\r
\r
- return value; // will mirror later\r
+ case PICO_INPUT_PAD_6BTN:\r
+ func = read_pad_6btn;\r
+ break;\r
+\r
+ default:\r
+ func = read_nothing;\r
+ break;\r
+ }\r
+\r
+ port_readers[port] = func;\r
}\r
\r
-static u32 io_ports_read(u32 a)\r
+NOINLINE u32 io_ports_read(u32 a)\r
{\r
u32 d;\r
a = (a>>1) & 0xf;\r
switch (a) {\r
case 0: d = Pico.m.hardware; break; // Hardware value (Version register)\r
- case 1: d = PadRead(0); break;\r
- case 2: d = PadRead(1); break;\r
+ case 1: d = port_read(0); break;\r
+ case 2: d = port_read(1); break;\r
+ case 3: d = port_read(2); break;\r
default: d = Pico.ioports[a]; break; // IO ports can be used as RAM\r
}\r
return d;\r
}\r
\r
-static void io_ports_write(u32 a, u32 d)\r
+NOINLINE void io_ports_write(u32 a, u32 d)\r
{\r
a = (a>>1) & 0xf;\r
\r
// 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r
- if (1 <= a && a <= 2 && (PicoOpt & POPT_6BTN_PAD))\r
+ if (1 <= a && a <= 2)\r
{\r
Pico.m.padDelay[a - 1] = 0;\r
if (!(Pico.ioports[a] & 0x40) && (d & 0x40))\r
Pico.m.padTHPhase[a - 1]++;\r
}\r
\r
- // cartain IO ports can be used as RAM\r
+ // certain IO ports can be used as RAM\r
Pico.ioports[a] = d;\r
}\r
\r
-static void ctl_write_z80busreq(u32 d)\r
+// lame..\r
+static int z80_cycles_from_68k(void)\r
+{\r
+ return z80_cycle_aim\r
+ + cycles_68k_to_z80(SekCyclesDone() - last_z80_sync);\r
+}\r
+\r
+void NOINLINE ctl_write_z80busreq(u32 d)\r
{\r
d&=1; d^=1;\r
elprintf(EL_BUSREQ, "set_zrun: %i->%i [%i] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);\r
{\r
if (d)\r
{\r
- z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());\r
+ z80_cycle_cnt = z80_cycles_from_68k();\r
}\r
else\r
{\r
- z80stopCycle = SekCyclesDone();\r
- if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset)\r
- PicoSyncZ80(z80stopCycle);\r
+ if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset) {\r
+ pprof_start(m68k);\r
+ PicoSyncZ80(SekCyclesDone());\r
+ pprof_end_sub(m68k);\r
+ }\r
}\r
Pico.m.z80Run = d;\r
}\r
}\r
\r
-static void ctl_write_z80reset(u32 d)\r
+void NOINLINE ctl_write_z80reset(u32 d)\r
{\r
d&=1; d^=1;\r
elprintf(EL_BUSREQ, "set_zreset: %i->%i [%i] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc);\r
{\r
if (d)\r
{\r
- if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run)\r
+ if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run) {\r
+ pprof_start(m68k);\r
PicoSyncZ80(SekCyclesDone());\r
+ pprof_end_sub(m68k);\r
+ }\r
YM2612ResetChip();\r
timers_reset();\r
}\r
else\r
{\r
- z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());\r
+ z80_cycle_cnt = z80_cycles_from_68k();\r
z80_reset();\r
}\r
Pico.m.z80_reset = d;\r
\r
// -----------------------------------------------------------------\r
\r
+#ifndef _ASM_MEMORY_C\r
+\r
// cart (save) RAM area (usually 0x200000 - ...)\r
static u32 PicoRead8_sram(u32 a)\r
{\r
static u32 PicoRead16_sram(u32 a)\r
{\r
u32 d;\r
- if (SRam.end >= a && a >= SRam.start && (Pico.m.sram_reg & SRR_MAPPED))\r
+ if (SRam.start <= a && a <= SRam.end && (Pico.m.sram_reg & SRR_MAPPED))\r
{\r
if (SRam.flags & SRF_EEPROM)\r
d = EEPROM_read();\r
return m68k_unmapped_read16(a);\r
}\r
\r
+#endif // _ASM_MEMORY_C\r
+\r
static void PicoWrite8_sram(u32 a, u32 d)\r
{\r
if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) {\r
EEPROM_write16(d);\r
}\r
else {\r
- // XXX: hardware could easily use MSB too..\r
u8 *pm = (u8 *)(SRam.data - SRam.start + a);\r
- if (*pm != (u8)d) {\r
+ if (pm[0] != (u8)(d >> 8)) {\r
SRam.changed = 1;\r
- *pm = (u8)d;\r
+ pm[0] = (u8)(d >> 8);\r
+ }\r
+ if (pm[1] != (u8)d) {\r
+ SRam.changed = 1;\r
+ pm[1] = (u8)d;\r
}\r
}\r
}\r
}\r
\r
if ((a & 0x4000) == 0x0000) { // z80 RAM\r
- SekCyclesBurn(2); // hack\r
+ SekCyclesBurnRun(2); // FIXME hack\r
Pico.zram[a & 0x1fff] = (u8)d;\r
return;\r
}\r
SN76496Write(d);\r
return;\r
}\r
-#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)\r
if ((a & 0x7f00) == 0x6000) // Z80 BANK register\r
{\r
Pico.m.z80_bank68k >>= 1;\r
elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k << 15);\r
return;\r
}\r
-#endif\r
elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @ %06x", a, d&0xff, SekPc);\r
}\r
\r
PicoWrite8_z80(a, d >> 8);\r
}\r
\r
+#ifndef _ASM_MEMORY_C\r
+\r
// IO/control area (0xa10000 - 0xa1ffff)\r
u32 PicoRead8_io(u32 a)\r
{\r
d = Pico.m.rotate++;\r
d ^= d << 6;\r
\r
- // bit8 seems to be readable in this range\r
- if ((a & 0xfc01) == 0x1000)\r
- d &= ~0x01;\r
+ if ((a & 0xfc00) == 0x1000) {\r
+ // bit8 seems to be readable in this range\r
+ if (!(a & 1))\r
+ d &= ~0x01;\r
\r
- if ((a & 0xff01) == 0x1100) { // z80 busreq (verified)\r
- d |= (Pico.m.z80Run | Pico.m.z80_reset) & 1;\r
- elprintf(EL_BUSREQ, "get_zrun: %02x [%i] @%06x", d, SekCyclesDone(), SekPc);\r
+ if ((a & 0xff01) == 0x1100) { // z80 busreq (verified)\r
+ d |= (Pico.m.z80Run | Pico.m.z80_reset) & 1;\r
+ elprintf(EL_BUSREQ, "get_zrun: %02x [%i] @%06x", d, SekCyclesDone(), SekPc);\r
+ }\r
goto end;\r
}\r
\r
- if (!(PicoOpt & POPT_DIS_32X)) {\r
+ if (PicoOpt & POPT_EN_32X) {\r
d = PicoRead8_32x(a);\r
goto end;\r
}\r
\r
if ((a & 0xffe0) == 0x0000) { // I/O ports\r
d = io_ports_read(a);\r
+ d |= d << 8;\r
goto end;\r
}\r
\r
d ^= (d << 5) ^ (d << 8);\r
\r
// bit8 seems to be readable in this range\r
- if ((a & 0xfc00) == 0x1000)\r
+ if ((a & 0xfc00) == 0x1000) {\r
d &= ~0x0100;\r
\r
- if ((a & 0xff00) == 0x1100) { // z80 busreq\r
- d |= ((Pico.m.z80Run | Pico.m.z80_reset) & 1) << 8;\r
- elprintf(EL_BUSREQ, "get_zrun: %04x [%i] @%06x", d, SekCyclesDone(), SekPc);\r
+ if ((a & 0xff00) == 0x1100) { // z80 busreq\r
+ d |= ((Pico.m.z80Run | Pico.m.z80_reset) & 1) << 8;\r
+ elprintf(EL_BUSREQ, "get_zrun: %04x [%i] @%06x", d, SekCyclesDone(), SekPc);\r
+ }\r
goto end;\r
}\r
\r
- if (!(PicoOpt & POPT_DIS_32X)) {\r
+ if (PicoOpt & POPT_EN_32X) {\r
d = PicoRead16_32x(a);\r
goto end;\r
}\r
Pico.m.sram_reg |= (u8)(d & 3);\r
return;\r
}\r
- if (!(PicoOpt & POPT_DIS_32X)) {\r
+ if (PicoOpt & POPT_EN_32X) {\r
PicoWrite8_32x(a, d);\r
return;\r
}\r
Pico.m.sram_reg |= (u8)(d & 3);\r
return;\r
}\r
- if (!(PicoOpt & POPT_DIS_32X)) {\r
+ if (PicoOpt & POPT_EN_32X) {\r
PicoWrite16_32x(a, d);\r
return;\r
}\r
m68k_unmapped_write16(a, d);\r
}\r
\r
+#endif // _ASM_MEMORY_C\r
+\r
// VDP area (0xc00000 - 0xdfffff)\r
// TODO: verify if lower byte goes to PSG on word writes\r
static u32 PicoRead8_vdp(u32 a)\r
\r
// Setup memory callbacks:\r
#ifdef EMU_C68K\r
- PicoCpuCM68k.checkpc = PicoCheckPc;\r
- PicoCpuCM68k.fetch8 = PicoCpuCM68k.read8 = m68k_read8;\r
- PicoCpuCM68k.fetch16 = PicoCpuCM68k.read16 = m68k_read16;\r
- PicoCpuCM68k.fetch32 = PicoCpuCM68k.read32 = m68k_read32;\r
- PicoCpuCM68k.write8 = m68k_write8;\r
- PicoCpuCM68k.write16 = m68k_write16;\r
- PicoCpuCM68k.write32 = m68k_write32;\r
+ PicoCpuCM68k.read8 = (void *)m68k_read8_map;\r
+ PicoCpuCM68k.read16 = (void *)m68k_read16_map;\r
+ PicoCpuCM68k.read32 = (void *)m68k_read16_map;\r
+ PicoCpuCM68k.write8 = (void *)m68k_write8_map;\r
+ PicoCpuCM68k.write16 = (void *)m68k_write16_map;\r
+ PicoCpuCM68k.write32 = (void *)m68k_write16_map;\r
+ PicoCpuCM68k.checkpc = NULL; /* unused */\r
+ PicoCpuCM68k.fetch8 = NULL;\r
+ PicoCpuCM68k.fetch16 = NULL;\r
+ PicoCpuCM68k.fetch32 = NULL;\r
#endif\r
#ifdef EMU_F68K\r
PicoCpuFM68k.read_byte = m68k_read8;\r
int i;\r
// by default, point everything to first 64k of ROM\r
for (i = 0; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
// now real ROM\r
for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;\r
// .. and RAM\r
for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
}\r
#endif\r
#ifdef EMU_M68K\r
timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew);\r
if (ym2612.OPN.ST.mode & 1) {\r
// this is not right, should really be done on overflow only\r
- int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
+ int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();\r
timer_a_next_oflow = (cycles << 8) + timer_a_step;\r
}\r
elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, timer_a_next_oflow>>8);\r
//ym2612.OPN.ST.TBT = 0;\r
timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800\r
if (ym2612.OPN.ST.mode & 2) {\r
- int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
+ int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();\r
timer_b_next_oflow = (cycles << 8) + timer_b_step;\r
}\r
elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, timer_b_next_oflow>>8);\r
return 0;\r
case 0x27: { /* mode, timer control */\r
int old_mode = ym2612.OPN.ST.mode;\r
- int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
+ int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();\r
ym2612.OPN.ST.mode = d;\r
\r
elprintf(EL_YMTIMER, "st mode %02x", d);\r
if (xcycles >= timer_b_next_oflow) \\r
ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2\r
\r
-static u32 MEMH_FUNC ym2612_read_local_z80(void)\r
+static u32 ym2612_read_local_z80(void)\r
{\r
int xcycles = z80_cyclesDone() << 8;\r
\r
\r
static u32 ym2612_read_local_68k(void)\r
{\r
- int xcycles = cycles_68k_to_z80(SekCyclesDone()) << 8;\r
+ int xcycles = z80_cycles_from_68k() << 8;\r
\r
ym2612_read_local();\r
\r
elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, timer_b_next_oflow >> 8);\r
}\r
\r
+#if defined(NO_32X) && defined(_ASM_MEMORY_C)\r
+// referenced by asm code\r
+u32 PicoRead8_32x(u32 a) { return 0; }\r
+u32 PicoRead16_32x(u32 a) { return 0; }\r
+void PicoWrite8_32x(u32 a, u32 d) {}\r
+void PicoWrite16_32x(u32 a, u32 d) {}\r
+#endif\r
+\r
// -----------------------------------------------------------------\r
// z80 memhandlers\r
\r
-static unsigned char MEMH_FUNC z80_md_vdp_read(unsigned short a)\r
+static unsigned char z80_md_vdp_read(unsigned short a)\r
{\r
// TODO?\r
elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, 0xff);\r
return 0xff;\r
}\r
\r
-static unsigned char MEMH_FUNC z80_md_bank_read(unsigned short a)\r
+static unsigned char z80_md_bank_read(unsigned short a)\r
{\r
unsigned int addr68k;\r
unsigned char ret;\r
return ret;\r
}\r
\r
-static void MEMH_FUNC z80_md_ym2612_write(unsigned int a, unsigned char data)\r
+static void z80_md_ym2612_write(unsigned int a, unsigned char data)\r
{\r
if (PicoOpt & POPT_EN_FM)\r
emustatus |= ym2612_write_local(a, data, 1) & 1;\r
}\r
\r
-static void MEMH_FUNC z80_md_vdp_br_write(unsigned int a, unsigned char data)\r
+static void z80_md_vdp_br_write(unsigned int a, unsigned char data)\r
{\r
// TODO: allow full VDP access\r
if ((a&0xfff9) == 0x7f11) // 7f11 7f13 7f15 7f17\r
elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);\r
}\r
\r
-static void MEMH_FUNC z80_md_bank_write(unsigned int a, unsigned char data)\r
+static void z80_md_bank_write(unsigned int a, unsigned char data)\r
{\r
unsigned int addr68k;\r
\r
drZ80.z80_out = z80_md_out;\r
#endif\r
#ifdef _USE_CZ80\r
- Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (UINT32)Pico.zram); // main RAM\r
- Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (UINT32)Pico.zram); // mirror\r
+ Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (FPTR)Pico.zram); // main RAM\r
+ Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (FPTR)Pico.zram); // mirror\r
Cz80_Set_INPort(&CZ80, z80_md_in);\r
Cz80_Set_OUTPort(&CZ80, z80_md_out);\r
#endif\r
}\r
\r
+// vim:shiftwidth=2:ts=2:expandtab\r