-// This is part of Pico Library\r
-\r
-// (c) Copyright 2004 Dave, All rights reserved.\r
-// (c) Copyright 2006-2009 notaz, All rights reserved.\r
-// Free for non-commercial use.\r
-\r
-// For commercial use, separate licencing terms must be obtained.\r
-\r
+/*\r
+ * memory handling\r
+ * (c) Copyright Dave, 2004\r
+ * (C) notaz, 2006-2010\r
+ *\r
+ * This work is licensed under the terms of MAME license.\r
+ * See COPYING file in the top-level directory.\r
+ */\r
\r
#include "pico_int.h"\r
#include "memory.h"\r
static void xmap_set(uptr *map, int shift, int start_addr, int end_addr,\r
const void *func_or_mh, int is_func)\r
{\r
+#ifdef __clang__\r
+ // workaround bug (segfault) in \r
+ // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)\r
+ volatile \r
+#endif\r
uptr addr = (uptr)func_or_mh;\r
int mask = (1 << shift) - 1;\r
int i;\r
for (i = start_addr >> shift; i <= end_addr >> shift; i++) {\r
map[i] = addr >> 1;\r
if (is_func)\r
- map[i] |= 1 << (sizeof(addr) * 8 - 1);\r
+ map[i] |= (uptr)1 << (sizeof(addr) * 8 - 1);\r
}\r
}\r
\r
\r
void m68k_map_unmap(int start_addr, int end_addr)\r
{\r
+#ifdef __clang__\r
+ // workaround bug (segfault) in \r
+ // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)\r
+ volatile \r
+#endif\r
uptr addr;\r
int shift = M68K_MEM_SHIFT;\r
int i;\r
#if defined(EMU_C68K)\r
void cyclone_crashed(u32 pc, struct Cyclone *context)\r
{\r
- elprintf(EL_STATUS|EL_ANOMALY, "%c68k crash detected @ %06x\n",\r
+ elprintf(EL_STATUS|EL_ANOMALY, "%c68k crash detected @ %06x",\r
context == &PicoCpuCM68k ? 'm' : 's', pc);\r
context->membase = (u32)Pico.rom;\r
context->pc = (u32)Pico.rom + Pico.romsize;\r
else\r
{\r
z80stopCycle = SekCyclesDone();\r
- if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset)\r
+ if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset) {\r
+ pprof_start(m68k);\r
PicoSyncZ80(z80stopCycle);\r
+ pprof_end_sub(m68k);\r
+ }\r
}\r
Pico.m.z80Run = d;\r
}\r
{\r
if (d)\r
{\r
- if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run)\r
+ if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run) {\r
+ pprof_start(m68k);\r
PicoSyncZ80(SekCyclesDone());\r
+ pprof_end_sub(m68k);\r
+ }\r
YM2612ResetChip();\r
timers_reset();\r
}\r
static u32 PicoRead16_sram(u32 a)\r
{\r
u32 d;\r
- if (SRam.end >= a && a >= SRam.start && (Pico.m.sram_reg & SRR_MAPPED))\r
+ if (SRam.start <= a && a <= SRam.end && (Pico.m.sram_reg & SRR_MAPPED))\r
{\r
if (SRam.flags & SRF_EEPROM)\r
d = EEPROM_read();\r
int i;\r
// by default, point everything to first 64k of ROM\r
for (i = 0; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
// now real ROM\r
for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;\r
// .. and RAM\r
for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
}\r
#endif\r
#ifdef EMU_M68K\r
elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, timer_b_next_oflow >> 8);\r
}\r
\r
+#if defined(NO_32X) && defined(_ASM_MEMORY_C)\r
+// referenced by asm code\r
+u32 PicoRead8_32x(u32 a) { return 0; }\r
+u32 PicoRead16_32x(u32 a) { return 0; }\r
+void PicoWrite8_32x(u32 a, u32 d) {}\r
+void PicoWrite16_32x(u32 a, u32 d) {}\r
+#endif\r
+\r
// -----------------------------------------------------------------\r
// z80 memhandlers\r
\r
drZ80.z80_out = z80_md_out;\r
#endif\r
#ifdef _USE_CZ80\r
- Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (UINT32)Pico.zram); // main RAM\r
- Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (UINT32)Pico.zram); // mirror\r
+ Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (FPTR)Pico.zram); // main RAM\r
+ Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (FPTR)Pico.zram); // mirror\r
Cz80_Set_INPort(&CZ80, z80_md_in);\r
Cz80_Set_OUTPort(&CZ80, z80_md_out);\r
#endif\r