32x and sms savestates. Core-independent z80 state. SS bugfixing/refactoring.

[picodrive.git] / pico / memory_arm.s

diff --git a/pico/memory_arm.s b/pico/memory_arm.s
index dde8342..972b918 100644 (file)
--- a/pico/memory_arm.s
+++ b/pico/memory_arm.s
@@ -27,7 +27,7 @@ PicoRead8_sram: @ u32 a, u32 d
     ldr     r3, =(Pico+0x22200)\r
     ldr     r1, [r2, #8]    @ SRam.end\r
     cmp     r0, r1\r
-    bge     m_read8_nosram\r
+    bgt     m_read8_nosram\r
     ldr     r1, [r2, #4]    @ SRam.start\r
     cmp     r0, r1\r
     blt     m_read8_nosram\r
@@ -58,8 +58,8 @@ m_read8_nosram:
 m_read8_eeprom:\r
     stmfd   sp!,{r0,lr}\r
     bl      EEPROM_read\r
-    ldmfd   sp!,{r0,lr}\r
-    tst     r0, #1\r
+    ldmfd   sp!,{r1,lr}\r
+    tst     r1, #1\r
     moveq   r0, r0, lsr #8\r
     bx      lr\r
 \r
@@ -126,7 +126,7 @@ PicoRead16_sram: @ u32 a, u32 d
     ldr     r3, =(Pico+0x22200)\r
     ldr     r1, [r2, #8]    @ SRam.end\r
     cmp     r0, r1\r
-    bge     m_read16_nosram\r
+    bgt     m_read16_nosram\r
     ldr     r1, [r2, #4]    @ SRam.start\r
     cmp     r0, r1\r
     blt     m_read16_nosram\r