\r
PicoInitMCD();\r
PicoSVPInit();\r
-\r
- SRam.data=0;\r
+ Pico32xInit();\r
}\r
\r
// to be called once on emu exit\r
PicoCartUnload();\r
z80_exit();\r
\r
- if (SRam.data) free(SRam.data); SRam.data=0;\r
+ if (SRam.data)\r
+ free(SRam.data);\r
}\r
\r
void PicoPower(void)\r
{\r
- unsigned char sram_reg=Pico.m.sram_reg; // must be preserved\r
-\r
Pico.m.frame_count = 0;\r
\r
// clear all memory of the emulated machine\r
if (PicoAHW & PAHW_MCD)\r
PicoPowerMCD();\r
\r
- Pico.m.sram_reg=sram_reg;\r
+ if (!(PicoOpt & POPT_DIS_32X))\r
+ PicoPower32x();\r
+\r
PicoReset();\r
}\r
\r
else\r
{\r
// Read cartridge region data:\r
- int region=PicoRead32(0x1f0);\r
+ unsigned short *rd = (unsigned short *)(Pico.rom + 0x1f0);\r
+ int region = (rd[0] << 16) | rd[1];\r
\r
- for (i=0;i<4;i++)\r
+ for (i = 0; i < 4; i++)\r
{\r
- int c=0;\r
+ int c;\r
\r
- c=region>>(i<<3); c&=0xff;\r
- if (c<=' ') continue;\r
+ c = region >> (i<<3);\r
+ c &= 0xff;\r
+ if (c <= ' ') continue;\r
\r
if (c=='J') support|=1;\r
else if (c=='U') support|=4;\r
\r
int PicoReset(void)\r
{\r
- unsigned char sram_reg=Pico.m.sram_reg; // must be preserved\r
-\r
- if (Pico.romsize<=0) return 1;\r
+ if (Pico.romsize <= 0)\r
+ return 1;\r
\r
/* must call now, so that banking is reset, and correct vectors get fetched */\r
- if (PicoResetHook) PicoResetHook();\r
+ if (PicoResetHook)\r
+ PicoResetHook();\r
\r
- PicoMemReset();\r
- SekReset();\r
memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
+ emustatus = 0;\r
+\r
+ if (PicoAHW & PAHW_SMS) {\r
+ PicoResetMS();\r
+ return 0;\r
+ }\r
+\r
+ SekReset();\r
// s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r
SekSetRealTAS(PicoAHW & PAHW_MCD);\r
SekCycleCntT=0;\r
if (PicoAHW & PAHW_MCD)\r
// needed for MCD to reset properly, probably some bug hides behind this..\r
memset(Pico.ioports,0,sizeof(Pico.ioports));\r
- emustatus = 0;\r
\r
Pico.m.dirtyPal = 1;\r
\r
Pico.m.z80_bank68k = 0;\r
+ Pico.m.z80_reset = 1;\r
memset(Pico.zram, 0, sizeof(Pico.zram)); // ??\r
\r
PicoDetectRegion();\r
PsndReset(); // pal must be known here\r
\r
// create an empty "dma" to cause 68k exec start at random frame location\r
- if (Pico.m.dma_xfers == 0 && !(PicoOpt&POPT_DIS_VDP_FIFO))\r
+ if (Pico.m.dma_xfers == 0 && !(PicoOpt & POPT_DIS_VDP_FIFO))\r
Pico.m.dma_xfers = rand() & 0x1fff;\r
\r
SekFinishIdleDet();\r
if (!(PicoOpt & POPT_DIS_IDLE_DET))\r
SekInitIdleDet();\r
\r
+ if (!(PicoOpt & POPT_DIS_32X)) {\r
+ PicoReset32x();\r
+ return 0;\r
+ }\r
+\r
// reset sram state; enable sram access by default if it doesn't overlap with ROM\r
- Pico.m.sram_reg=sram_reg&0x14;\r
- if (!(Pico.m.sram_reg&4) && Pico.romsize <= SRam.start) Pico.m.sram_reg |= 1;\r
+ Pico.m.sram_reg = 0;\r
+ if ((SRam.flags & SRF_EEPROM) || Pico.romsize <= SRam.start)\r
+ Pico.m.sram_reg |= SRR_MAPPED;\r
\r
- elprintf(EL_STATUS, "sram: det: %i; eeprom: %i; start: %06x; end: %06x",\r
- (Pico.m.sram_reg>>4)&1, (Pico.m.sram_reg>>2)&1, SRam.start, SRam.end);\r
+ if (SRam.flags & SRF_ENABLED)\r
+ elprintf(EL_STATUS, "sram: %06x - %06x; eeprom: %i", SRam.start, SRam.end,\r
+ !!(SRam.flags & SRF_EEPROM));\r
\r
return 0;\r
}\r
{\r
Pico.m.frame_count++;\r
\r
+ if (PicoAHW & PAHW_SMS) {\r
+ PicoFrameMS();\r
+ return;\r
+ }\r
+\r
+ // TODO: MCD+32X\r
if (PicoAHW & PAHW_MCD) {\r
PicoFrameMCD();\r
return;\r
}\r
- else if (PicoAHW & PAHW_SMS) {\r
- PicoFrameMS();\r
+\r
+ if (PicoAHW & PAHW_32X) {\r
+ PicoFrame32x();\r
return;\r
}\r
\r
//if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r
\r
- if (!(PicoOpt&POPT_ALT_RENDERER))\r
- PicoFrameStart();\r
-\r
+ PicoFrameStart();\r
PicoFrameHints();\r
}\r
\r
void PicoFrameDrawOnly(void)\r
{\r
- PicoFrameStart();\r
- PicoDrawSync(223, 0);\r
+ if (!(PicoAHW & PAHW_SMS)) {\r
+ PicoFrameStart();\r
+ PicoDrawSync(223, 0);\r
+ } else {\r
+ PicoFrameDrawOnlyMS();\r
+ }\r
}\r
\r
void PicoGetInternal(pint_t which, pint_ret_t *r)\r