#define z80_run(cycles) ((cycles) - DrZ80Run(&drZ80, cycles))\r
#define z80_run_nr(cycles) DrZ80Run(&drZ80, cycles)\r
#define z80_int() drZ80.Z80_IRQ = 1\r
+#define z80_int() drZ80.Z80_IRQ = 1\r
+#define z80_nmi() drZ80.Z80IF |= 8\r
\r
#define z80_cyclesLeft drZ80.cycles\r
#define z80_pc() (drZ80.Z80PC - drZ80.Z80PC_BASE)\r
#define z80_run(cycles) Cz80_Exec(&CZ80, cycles)\r
#define z80_run_nr(cycles) Cz80_Exec(&CZ80, cycles)\r
#define z80_int() Cz80_Set_IRQ(&CZ80, 0, HOLD_LINE)\r
+#define z80_nmi() Cz80_Set_IRQ(&CZ80, IRQ_LINE_NMI, 0)\r
\r
#define z80_cyclesLeft (CZ80.ICount - CZ80.ExtraCycles)\r
#define z80_pc() Cz80_Get_Reg(&CZ80, CZ80_PC)\r
#define z80_run(cycles) (cycles)\r
#define z80_run_nr(cycles)\r
#define z80_int()\r
+#define z80_nmi()\r
\r
#endif\r
\r
{\r
unsigned char carthw[0x10];\r
unsigned char io_ctl;\r
- unsigned char pad[0x4f];\r
+ unsigned char nmi_state;\r
+ unsigned char pad[0x4e];\r
};\r
\r
// some assembly stuff depend on these, do not touch!\r
} ch[8];\r
};\r
\r
+#define PCD_ST_S68K_RST 1\r
+\r
struct mcd_misc\r
{\r
unsigned short hint_vector;\r
- unsigned char busreq;\r
+ unsigned char busreq; // not s68k_regs[1]\r
unsigned char s68k_pend_ints;\r
unsigned int state_flags; // 04\r
unsigned int stopwatch_base_c;\r
unsigned short s68k_poll_cnt;\r
unsigned int s68k_poll_clk;\r
unsigned char bcram_reg; // 18: battery-backed RAM cart register\r
- unsigned char pad2;\r
+ unsigned char dmna_ret_2m;\r
unsigned short pad3;\r
int pad4[9];\r
};\r
unsigned int sh2_peripheral_read8(unsigned int a, SH2 *sh2);\r
unsigned int sh2_peripheral_read16(unsigned int a, SH2 *sh2);\r
unsigned int sh2_peripheral_read32(unsigned int a, SH2 *sh2);\r
-void sh2_peripheral_write8(unsigned int a, unsigned int d, SH2 *sh2);\r
-void sh2_peripheral_write16(unsigned int a, unsigned int d, SH2 *sh2);\r
-void sh2_peripheral_write32(unsigned int a, unsigned int d, SH2 *sh2);\r
+void REGPARM(3) sh2_peripheral_write8(unsigned int a, unsigned int d, SH2 *sh2);\r
+void REGPARM(3) sh2_peripheral_write16(unsigned int a, unsigned int d, SH2 *sh2);\r
+void REGPARM(3) sh2_peripheral_write32(unsigned int a, unsigned int d, SH2 *sh2);\r
\r
#else\r
#define Pico32xInit()\r
#define cdprintf(x...)\r
#endif\r
\r
-#ifdef __i386__\r
+#if defined(__GNUC__) && defined(__i386__)\r
#define REGPARM(x) __attribute__((regparm(x)))\r
#else\r
#define REGPARM(x)\r