#define z80_int() drZ80.Z80_IRQ = 1\r
\r
#define z80_cyclesLeft drZ80.cycles\r
+#define z80_pc() (drZ80.Z80PC - drZ80.Z80PC_BASE)\r
\r
#elif defined(_USE_CZ80)\r
#include "../cpu/cz80/cz80.h"\r
#define z80_int() Cz80_Set_IRQ(&CZ80, 0, HOLD_LINE)\r
\r
#define z80_cyclesLeft (CZ80.ICount - CZ80.ExtraCycles)\r
+#define z80_pc() Cz80_Get_Reg(&CZ80, CZ80_PC)\r
\r
#else\r
\r
char dirtyPal; // 06 Is the palette dirty (1 - change @ this frame, 2 - some time before)\r
unsigned char hardware; // 07 Hardware value for country\r
unsigned char pal; // 08 1=PAL 0=NTSC\r
- unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access)\r
+ unsigned char sram_reg; // 09 SRAM reg. See SRR_* below\r
unsigned short z80_bank68k; // 0a\r
- unsigned short z80_lastaddr; // this is for Z80 faking\r
- unsigned char z80_fakeval;\r
- unsigned char z80_reset; // z80 reset held\r
+ unsigned short pad0;\r
+ unsigned char pad1;\r
+ unsigned char z80_reset; // 0f z80 reset held\r
unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay\r
unsigned short eeprom_addr; // EEPROM address register\r
- unsigned char eeprom_cycle; // EEPROM SRAM cycle number\r
+ unsigned char eeprom_cycle; // EEPROM cycle number\r
unsigned char eeprom_slave; // EEPROM slave word for X24C02 and better SRAMs\r
- unsigned char prot_bytes[2]; // simple protection faking\r
+ unsigned char eeprom_status;\r
+ unsigned char pad2;\r
unsigned short dma_xfers; // 18\r
- unsigned char pad[2];\r
+ unsigned char eeprom_wb[2]; // EEPROM latch/write buffer\r
unsigned int frame_count; // 1c for movies and idle det\r
};\r
\r
struct Pico\r
{\r
unsigned char ram[0x10000]; // 0x00000 scratch ram\r
- unsigned short vram[0x8000]; // 0x10000\r
+ union { // vram is byteswapped for easier reads when drawing\r
+ unsigned short vram[0x8000]; // 0x10000\r
+ unsigned char vramb[0x4000]; // VRAM in SMS mode\r
+ };\r
unsigned char zram[0x2000]; // 0x20000 Z80 ram\r
unsigned char ioports[0x10];\r
- unsigned int pad[0x3c]; // unused\r
+ unsigned char sms_io_ctl;\r
+ unsigned char pad[0xef]; // unused\r
unsigned short cram[0x40]; // 0x22100\r
unsigned short vsram[0x40]; // 0x22180\r
\r
};\r
\r
// sram\r
+#define SRR_MAPPED (1 << 0)\r
+#define SRR_READONLY (1 << 1)\r
+\r
+#define SRF_ENABLED (1 << 0)\r
+#define SRF_EEPROM (1 << 1)\r
+\r
struct PicoSRAM\r
{\r
unsigned char *data; // actual data\r
unsigned int start; // start address in 68k address space\r
unsigned int end;\r
- unsigned char unused1; // 0c: unused\r
+ unsigned char flags; // 0c: SRF_*\r
unsigned char unused2;\r
unsigned char changed;\r
- unsigned char eeprom_type; // eeprom type: 0: 7bit (24C01), 2: device with 2 addr words (X24C02+), 3: dev with 3 addr words\r
- unsigned char eeprom_abits; // eeprom access must be odd addr for: bit0 ~ cl, bit1 ~ out\r
+ unsigned char eeprom_type; // eeprom type: 0: 7bit (24C01), 2: 2 addr words (X24C02+), 3: 3 addr words\r
+ unsigned char unused3;\r
unsigned char eeprom_bit_cl; // bit number for cl\r
unsigned char eeprom_bit_in; // bit number for in\r
unsigned char eeprom_bit_out; // bit number for out\r
+ unsigned int size;\r
};\r
\r
// MCD\r
Rot_Comp rot_comp;\r
} mcd_state;\r
\r
+// XXX: this will need to be reworked for cart+cd support.\r
#define Pico_mcd ((mcd_state *)Pico.rom)\r
\r
+// 32X\r
+#define P32XV_nPAL (1<<15)\r
+#define P32XV_PRI (1<< 7)\r
+#define P32XV_Mx (3<< 0)\r
+\r
+#define P32XV_VBLK (1<<15)\r
+#define P32XV_HBLK (1<<14)\r
+#define P32XV_PEN (1<<13)\r
+#define P32XV_nFEN (1<< 1)\r
+#define P32XV_FS (1<< 0)\r
+\r
+struct Pico32x\r
+{\r
+ unsigned short regs[0x20];\r
+ unsigned short vdp_regs[0x10];\r
+ unsigned char pending_fb;\r
+ unsigned char dirty_pal;\r
+ unsigned char pad[2];\r
+};\r
+\r
+struct Pico32xMem\r
+{\r
+ unsigned char sdram[0x40000];\r
+ unsigned short dram[2][0x20000/2]; // AKA fb\r
+ unsigned char m68k_rom[0x10000]; // 0x100; using M68K_BANK_SIZE\r
+ unsigned short pal[0x100];\r
+ unsigned short pal_native[0x100]; // converted to native (for renderer)\r
+};\r
\r
// area.c\r
PICO_INTERNAL void PicoAreaPackCpu(unsigned char *cpu, int is_sub);\r
extern areaclose *areaClose;\r
\r
// cart.c\r
+extern void (*PicoCartMemSetup)(void);\r
extern void (*PicoCartUnloadHook)(void);\r
\r
// debug.c\r
// draw.c\r
PICO_INTERNAL void PicoFrameStart(void);\r
void PicoDrawSync(int to, int blank_last_line);\r
+void BackFill(int reg7, int sh);\r
+void FinalizeLineRGB555(int sh, int line);\r
extern int DrawScanline;\r
#define MAX_LINE_SPRITES 29\r
extern unsigned char HighLnSpr[240][3 + MAX_LINE_SPRITES];\r
// draw2.c\r
PICO_INTERNAL void PicoFrameFull();\r
\r
+// mode4.c\r
+void PicoFrameStartMode4(void);\r
+void PicoLineMode4(int line);\r
+void PicoDoHighPal555M4(void);\r
+void PicoDrawSetColorFormatMode4(int which);\r
+\r
// memory.c\r
-PICO_INTERNAL void PicoInitPc(unsigned int pc);\r
-PICO_INTERNAL unsigned int PicoCheckPc(unsigned int pc);\r
-PICO_INTERNAL_ASM unsigned int PicoRead32(unsigned int a);\r
PICO_INTERNAL void PicoMemSetup(void);\r
-PICO_INTERNAL_ASM void PicoMemReset(void);\r
-PICO_INTERNAL void PicoMemResetHooks(void);\r
-PICO_INTERNAL int PadRead(int i);\r
-PICO_INTERNAL int ym2612_write_local(unsigned int a, unsigned int d, int is_from_z80);\r
-void z80_mem_setup(void);\r
-extern unsigned int (*PicoRead16Hook)(unsigned int a, int realsize);\r
-extern void (*PicoWrite8Hook) (unsigned int a,unsigned int d,int realsize);\r
-extern void (*PicoWrite16Hook)(unsigned int a,unsigned int d,int realsize);\r
-\r
-// cd/memory.c\r
-PICO_INTERNAL void PicoMemSetupCD(void);\r
-PICO_INTERNAL_ASM void PicoMemResetCD(int r3);\r
-PICO_INTERNAL_ASM void PicoMemResetCDdecode(int r3);\r
+unsigned int PicoRead8_io(unsigned int a);\r
+unsigned int PicoRead16_io(unsigned int a);\r
+void PicoWrite8_io(unsigned int a, unsigned int d);\r
+void PicoWrite16_io(unsigned int a, unsigned int d);\r
\r
// pico/memory.c\r
PICO_INTERNAL void PicoMemSetupPico(void);\r
-PICO_INTERNAL unsigned int ym2612_read_local_68k(void);\r
+\r
+// cd/memory.c\r
+PICO_INTERNAL void PicoMemSetupCD(void);\r
+void PicoMemStateLoaded(void);\r
\r
// pico.c\r
extern struct Pico Pico;\r
extern int (*PicoDmaHook)(unsigned int source, int len, unsigned short **srcp, unsigned short **limitp);\r
\r
// misc.c\r
-PICO_INTERNAL void SRAMWriteEEPROM(unsigned int d);\r
-PICO_INTERNAL void SRAMUpdPending(unsigned int a, unsigned int d);\r
-PICO_INTERNAL_ASM unsigned int SRAMReadEEPROM(void);\r
PICO_INTERNAL_ASM void memcpy16(unsigned short *dest, unsigned short *src, int count);\r
PICO_INTERNAL_ASM void memcpy16bswap(unsigned short *dest, void *src, int count);\r
PICO_INTERNAL_ASM void memcpy32(int *dest, int *src, int count); // 32bit word count\r
PICO_INTERNAL_ASM void memset32(int *dest, int c, int count);\r
\r
+// eeprom.c\r
+void EEPROM_write8(unsigned int a, unsigned int d);\r
+void EEPROM_write16(unsigned int d);\r
+unsigned int EEPROM_read(void);\r
+\r
// z80 functionality wrappers\r
PICO_INTERNAL void z80_init(void);\r
PICO_INTERNAL void z80_pack(unsigned char *data);\r
PICO_INTERNAL void z80_unpack(unsigned char *data);\r
PICO_INTERNAL void z80_reset(void);\r
PICO_INTERNAL void z80_exit(void);\r
-void z80_map_set(unsigned long *map, int start_addr,\r
- int end_addr, void *func_or_mh, int is_func);\r
\r
// cd/misc.c\r
PICO_INTERNAL_ASM void wram_2M_to_1M(unsigned char *m);\r
PICO_INTERNAL void PsndDoDAC(int line_to);\r
PICO_INTERNAL void PsndClear(void);\r
PICO_INTERNAL void PsndGetSamples(int y);\r
+PICO_INTERNAL void PsndGetSamplesMS(void);\r
extern int PsndDacLine;\r
\r
// sms.c\r
void PicoPowerMS(void);\r
+void PicoResetMS(void);\r
void PicoMemSetupMS(void);\r
void PicoFrameMS(void);\r
+void PicoFrameDrawOnlyMS(void);\r
+\r
+// 32x/32x.c\r
+extern struct Pico32x Pico32x;\r
+void Pico32xInit(void);\r
+void PicoPower32x(void);\r
+void PicoReset32x(void);\r
+void Pico32xStartup(void);\r
+void PicoUnload32x(void);\r
+void PicoFrame32x(void);\r
+\r
+// 32x/memory.c\r
+struct Pico32xMem *Pico32xMem;\r
+unsigned int PicoRead8_32x(unsigned int a);\r
+unsigned int PicoRead16_32x(unsigned int a);\r
+void PicoWrite8_32x(unsigned int a, unsigned int d);\r
+void PicoWrite16_32x(unsigned int a, unsigned int d);\r
+void PicoMemSetup32x(void);\r
+void Pico32xSwapDRAM(int b);\r
+\r
+// 32x/draw.c\r
+void FinalizeLine32xRGB555(int sh, int line);\r
+\r
+/* avoid dependency on newer glibc */\r
+static __inline int isspace_(int c)\r
+{\r
+ return (0x09 <= c && c <= 0x0d) || c == ' ';\r
+}\r
\r
// emulation event logging\r
#ifndef EL_LOGMASK\r
#define EL_SVP 0x00004000 /* SVP stuff */\r
#define EL_PICOHW 0x00008000 /* Pico stuff */\r
#define EL_IDLE 0x00010000 /* idle loop det. */\r
+#define EL_CDREGS 0x00020000 /* MCD: register access */\r
+#define EL_CDREG3 0x00040000 /* MCD: register 3 only */\r
+#define EL_32X 0x00080000\r
\r
#define EL_STATUS 0x40000000 /* status messages */\r
#define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */\r
#define MEMH_FUNC\r
#endif\r
\r
+#ifdef __GNUC__\r
+#define NOINLINE __attribute__((noinline))\r
+#else\r
+#define NOINLINE\r
+#endif\r
+\r
#ifdef __cplusplus\r
} // End of extern "C"\r
#endif\r
notaz.gp2x.de / picodrive.git / blobdiff