#define P32XS2_ADEN (1<< 9)\r
#define P32XS_FULL (1<< 7) // DREQ FIFO full\r
#define P32XS_68S (1<< 2)\r
+#define P32XS_DMA (1<< 1)\r
#define P32XS_RV (1<< 0)\r
\r
#define P32XV_nPAL (1<<15) // VDP\r
{\r
unsigned short regs[0x20];\r
unsigned short vdp_regs[0x10];\r
+ unsigned short sh2_regs[3];\r
unsigned char pending_fb;\r
unsigned char dirty_pal;\r
- unsigned char pad[2];\r
unsigned int emu_flags;\r
unsigned char sh2irq_mask[2];\r
unsigned char sh2irqi[2]; // individual\r
void PicoWrite16_32x(unsigned int a, unsigned int d);\r
void PicoMemSetup32x(void);\r
void Pico32xSwapDRAM(int b);\r
-void p32x_poll_event(int is_vdp);\r
+void p32x_poll_event(int cpu_mask, int is_vdp);\r
\r
// 32x/draw.c\r
void FinalizeLine32xRGB555(int sh, int line);\r