#define SekSr CycloneGetSr(&PicoCpuCM68k)\r
#define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }\r
#define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } }\r
+#define SekIsStoppedM68k() (PicoCpuCM68k.state_flags&1)\r
#define SekIsStoppedS68k() (PicoCpuCS68k.state_flags&1)\r
#define SekShouldInterrupt (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))\r
\r
PicoCpuFS68k.execinfo &= ~FM68K_HALTED; \\r
if (x) { PicoCpuFS68k.execinfo |= FM68K_HALTED; PicoCpuFS68k.io_cycle_counter = 0; } \\r
}\r
+#define SekIsStoppedM68k() (PicoCpuFM68k.execinfo&FM68K_HALTED)\r
#define SekIsStoppedS68k() (PicoCpuFS68k.execinfo&FM68K_HALTED)\r
#define SekShouldInterrupt fm68k_would_interrupt()\r
\r
if(x) { SET_CYCLES(0); PicoCpuMS68k.stopped=STOP_LEVEL_STOP; } \\r
else PicoCpuMS68k.stopped=0; \\r
}\r
+#define SekIsStoppedM68k() (PicoCpuMM68k.stopped==STOP_LEVEL_STOP)\r
#define SekIsStoppedS68k() (PicoCpuMS68k.stopped==STOP_LEVEL_STOP)\r
#define SekShouldInterrupt (CPU_INT_LEVEL > FLAG_INT_MASK)\r
\r
#define ssh2 sh2s[1]\r
\r
#ifndef DRC_SH2\r
-# define ash2_end_run(after) if (sh2->icount > (after)) sh2->icount = after\r
-# define ash2_cycles_done() (sh2->cycles_aim - sh2->icount)\r
+# define ash2_end_run(sh2, after) do { \\r
+ if ((sh2)->icount > (after)) { \\r
+ (sh2)->cycles_timeslice -= (sh2)->icount; \\r
+ (sh2)->icount = after; \\r
+ } \\r
+} while (0)\r
+# define ash2_cycles_done(sh2) ((sh2)->cycles_timeslice - (sh2)->icount)\r
#else\r
-# define ash2_end_run(after) { \\r
- if ((sh2->sr >> 12) > (after)) \\r
- { sh2->sr &= 0xfff; sh2->sr |= (after) << 12; } \\r
-}\r
-# define ash2_cycles_done() (sh2->cycles_aim - (sh2->sr >> 12))\r
+# define ash2_end_run(sh2, after) do { \\r
+ int left = (sh2)->sr >> 12; \\r
+ if (left > (after)) { \\r
+ (sh2)->cycles_timeslice -= left; \\r
+ (sh2)->sr &= 0xfff; \\r
+ (sh2)->sr |= (after) << 12; \\r
+ } \\r
+} while (0)\r
+# define ash2_cycles_done(sh2) ((sh2)->cycles_timeslice - ((sh2)->sr >> 12))\r
#endif\r
\r
//#define sh2_pc(c) (c) ? ssh2.ppc : msh2.ppc\r
#define P32XF_68KVPOLL (1 << 3)\r
#define P32XF_MSH2VPOLL (1 << 4)\r
#define P32XF_SSH2VPOLL (1 << 5)\r
+#define P32XF_PWM_PEND (1 << 6)\r
\r
#define P32XI_VRES (1 << 14/2) // IRL/2\r
#define P32XI_VINT (1 << 12/2)\r
unsigned short dmac_fifo[DMAC_FIFO_LEN];\r
unsigned int dmac_ptr;\r
unsigned int pwm_irq_sample_cnt;\r
- unsigned int reserved[9];\r
+ unsigned char comm_dirty_68k;\r
+ unsigned char comm_dirty_sh2;\r
+ unsigned short pad;\r
+ unsigned int reserved[8];\r
};\r
\r
struct Pico32xMem\r
// 32x/32x.c\r
#ifndef NO_32X\r
extern struct Pico32x Pico32x;\r
+enum p32x_event {\r
+ P32X_EVENT_PWM,\r
+ P32X_EVENT_FILLEND,\r
+ P32X_EVENT_COUNT,\r
+};\r
+extern unsigned int event_times[P32X_EVENT_COUNT];\r
+\r
void Pico32xInit(void);\r
void PicoPower32x(void);\r
void PicoReset32x(void);\r
void Pico32xStartup(void);\r
void PicoUnload32x(void);\r
void PicoFrame32x(void);\r
+void p32x_sync_sh2s(unsigned int m68k_target);\r
void p32x_update_irls(int nested_call);\r
void p32x_reset_sh2s(void);\r
+void p32x_event_schedule(enum p32x_event event, unsigned int now, int after);\r
\r
// 32x/memory.c\r
struct Pico32xMem *Pico32xMem;\r
unsigned int p32x_pwm_read16(unsigned int a);\r
void p32x_pwm_write16(unsigned int a, unsigned int d);\r
void p32x_pwm_update(int *buf32, int length, int stereo);\r
-void p32x_timers_do(int line_call);\r
+void p32x_timers_do(unsigned int cycles);\r
void p32x_timers_recalc(void);\r
-extern int pwm_frame_smp_cnt;\r
+void p32x_pwm_schedule(unsigned int now);\r
#else\r
#define Pico32xInit()\r
#define PicoPower32x()\r
\r
#if EL_LOGMASK\r
#define elprintf(w,f,...) \\r
-{ \\r
+do { \\r
if ((w) & EL_LOGMASK) \\r
lprintf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__); \\r
-}\r
+} while (0)\r
#elif defined(_MSC_VER)\r
#define elprintf\r
#else\r