#define sh2_vbr(c) (c) ? ssh2.vbr : msh2.vbr\r
#define sh2_sr(c) (c) ? ssh2.sr : msh2.sr\r
\r
+#define sh2_set_gbr(c, v) \\r
+ { if (c) ssh2.gbr = v; else msh2.gbr = v; }\r
+#define sh2_set_vbr(c, v) \\r
+ { if (c) ssh2.vbr = v; else msh2.vbr = v; }\r
+\r
// ---------------------------------------------------------\r
\r
// main oscillator clock which controls timing\r
\r
// 32X\r
#define P32XS_FM (1<<15)\r
+#define P32XS_REN (1<< 7)\r
+#define P32XS_nRES (1<< 1)\r
+#define P32XS_ADEN (1<< 0)\r
#define P32XS2_ADEN (1<< 9)\r
#define P32XS_FULL (1<< 7) // DREQ FIFO full\r
#define P32XS_68S (1<< 2)\r
extern areaclose *areaClose;\r
\r
// cart.c\r
+void Byteswap(void *dst, const void *src, int len);\r
extern void (*PicoCartMemSetup)(void);\r
extern void (*PicoCartUnloadHook)(void);\r
\r
void PicoUnload32x(void);\r
void PicoFrame32x(void);\r
void p32x_update_irls(void);\r
+void p32x_reset_sh2s(void);\r
\r
// 32x/memory.c\r
struct Pico32xMem *Pico32xMem;\r