#define SekEndTimesliceS68k(after) PicoCpuCS68k.cycles=after\r
#define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase)\r
#define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase)\r
-#define SekDar(x) (x < 8 ? PicoCpuCM68k.d[x] : PicoCpuCM68k.a[x - 8])\r
+#define SekDar(x) (x < 8 ? PicoCpuCM68k.d[x] : PicoCpuCM68k.a[x - 8])\r
+#define SekDarS68k(x) (x < 8 ? PicoCpuCS68k.d[x] : PicoCpuCS68k.a[x - 8])\r
#define SekSr CycloneGetSr(&PicoCpuCM68k)\r
+#define SekSrS68k CycloneGetSr(&PicoCpuCS68k)\r
#define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }\r
#define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } }\r
#define SekIsStoppedM68k() (PicoCpuCM68k.state_flags&1)\r
#define SekEndTimesliceS68k(after) PicoCpuFS68k.io_cycle_counter=after\r
#define SekPc fm68k_get_pc(&PicoCpuFM68k)\r
#define SekPcS68k fm68k_get_pc(&PicoCpuFS68k)\r
-#define SekDar(x) (x < 8 ? PicoCpuFM68k.dreg[x].D : PicoCpuFM68k.areg[x - 8].D)\r
+#define SekDar(x) (x < 8 ? PicoCpuFM68k.dreg[x].D : PicoCpuFM68k.areg[x - 8].D)\r
+#define SekDarS68k(x) (x < 8 ? PicoCpuFS68k.dreg[x].D : PicoCpuFS68k.areg[x - 8].D)\r
#define SekSr PicoCpuFM68k.sr\r
+#define SekSrS68k PicoCpuFS68k.sr\r
#define SekSetStop(x) { \\r
PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \\r
if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \\r
#define SekEndTimesliceS68k(after) PicoCpuMS68k.cyc_remaining_cycles=after\r
#define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC)\r
#define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC)\r
-#define SekDar(x) PicoCpuMM68k.dar[x]\r
-#define SekSr m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR)\r
+#define SekDar(x) PicoCpuMM68k.dar[x]\r
+#define SekDarS68k(x) PicoCpuMS68k.dar[x]\r
+#define SekSr m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR)\r
+#define SekSrS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_SR)\r
#define SekSetStop(x) { \\r
if(x) { SET_CYCLES(0); PicoCpuMM68k.stopped=STOP_LEVEL_STOP; } \\r
else PicoCpuMM68k.stopped=0; \\r
#ifndef DRC_SH2\r
# define sh2_end_run(sh2, after_) do { \\r
if ((sh2)->icount > (after_)) { \\r
- (sh2)->cycles_timeslice -= (sh2)->icount; \\r
+ (sh2)->cycles_timeslice -= (sh2)->icount - (after_); \\r
(sh2)->icount = after_; \\r
} \\r
} while (0)\r
# define sh2_cycles_left(sh2) (sh2)->icount\r
-# define sh2_pc(c) (c) ? ssh2.ppc : msh2.ppc\r
+# define sh2_pc(sh2) (sh2)->ppc\r
#else\r
# define sh2_end_run(sh2, after_) do { \\r
int left_ = (signed int)(sh2)->sr >> 12; \\r
if (left_ > (after_)) { \\r
- (sh2)->cycles_timeslice -= left_; \\r
+ (sh2)->cycles_timeslice -= left_ - (after_); \\r
(sh2)->sr &= 0xfff; \\r
(sh2)->sr |= (after_) << 12; \\r
} \\r
} while (0)\r
# define sh2_cycles_left(sh2) ((signed int)(sh2)->sr >> 12)\r
-# define sh2_pc(c) (c) ? ssh2.pc : msh2.pc\r
+# define sh2_pc(sh2) (sh2)->pc\r
#endif\r
\r
#define sh2_cycles_done(sh2) ((int)(sh2)->cycles_timeslice - sh2_cycles_left(sh2))\r
#define SH2_DRCBLK_RAM_SHIFT 1\r
#define SH2_DRCBLK_DA_SHIFT 1\r
\r
+#define SH2_READ_SHIFT 25\r
#define SH2_WRITE_SHIFT 25\r
\r
struct Pico32x\r
unsigned char m68k_rom[0x100];\r
unsigned char m68k_rom_bank[0x10000]; // M68K_BANK_SIZE\r
};\r
- unsigned char data_array[2][0x1000]; // cache in SH2s (can be used as RAM)\r
#ifdef DRC_SH2\r
unsigned short drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)];\r
#endif\r
unsigned char sh2_rom_s[0x400];\r
unsigned short pal[0x100];\r
unsigned short pal_native[0x100]; // converted to native (for renderer)\r
- unsigned int sh2_peri_regs[2][0x200/4]; // periphereal regs of SH2s\r
signed short pwm[2*PWM_BUFF_LEN]; // PWM buffer for current frame\r
signed short pwm_fifo[2][4]; // [0] - current, others - fifo entries\r
};\r
void SekStepM68k(void);\r
void SekInitIdleDet(void);\r
void SekFinishIdleDet(void);\r
+#if defined(CPU_CMP_R) || defined(CPU_CMP_W)\r
+void SekTrace(int is_s68k);\r
+#else\r
+#define SekTrace(x)\r
+#endif\r
\r
// cd/sek.c\r
PICO_INTERNAL void SekInitS68k(void);\r
extern int Pico32xDrawMode;\r
\r
// 32x/pwm.c\r
-unsigned int p32x_pwm_read16(unsigned int a, unsigned int cycles);\r
-void p32x_pwm_write16(unsigned int a, unsigned int d, unsigned int cycles);\r
+unsigned int p32x_pwm_read16(unsigned int a, SH2 *sh2,\r
+ unsigned int m68k_cycles);\r
+void p32x_pwm_write16(unsigned int a, unsigned int d,\r
+ SH2 *sh2, unsigned int m68k_cycles);\r
void p32x_pwm_update(int *buf32, int length, int stereo);\r
void p32x_pwm_ctl_changed(void);\r
void p32x_pwm_schedule(unsigned int m68k_now);\r
void p32x_dreq1_trigger(void);\r
void p32x_timers_recalc(void);\r
void p32x_timers_do(unsigned int m68k_slice);\r
-unsigned int sh2_peripheral_read8(unsigned int a, int id);\r
-unsigned int sh2_peripheral_read16(unsigned int a, int id);\r
-unsigned int sh2_peripheral_read32(unsigned int a, int id);\r
-int sh2_peripheral_write8(unsigned int a, unsigned int d, int id);\r
-int sh2_peripheral_write16(unsigned int a, unsigned int d, int id);\r
-void sh2_peripheral_write32(unsigned int a, unsigned int d, int id);\r
+unsigned int sh2_peripheral_read8(unsigned int a, SH2 *sh2);\r
+unsigned int sh2_peripheral_read16(unsigned int a, SH2 *sh2);\r
+unsigned int sh2_peripheral_read32(unsigned int a, SH2 *sh2);\r
+void sh2_peripheral_write8(unsigned int a, unsigned int d, SH2 *sh2);\r
+void sh2_peripheral_write16(unsigned int a, unsigned int d, SH2 *sh2);\r
+void sh2_peripheral_write32(unsigned int a, unsigned int d, SH2 *sh2);\r
\r
#else\r
#define Pico32xInit()\r