#define SekIsStoppedS68k() (PicoCpuCS68k.state_flags&1)\r
#define SekShouldInterrupt() (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))\r
\r
+#define SekNotPolling PicoCpuCM68k.not_pol\r
+#define SekNotPollingS68k PicoCpuCS68k.not_pol\r
+\r
#define SekInterrupt(i) PicoCpuCM68k.irq=i\r
#define SekIrqLevel PicoCpuCM68k.irq\r
\r
#define SekIsStoppedS68k() (PicoCpuFS68k.execinfo&FM68K_HALTED)\r
#define SekShouldInterrupt() fm68k_would_interrupt()\r
\r
+#define SekNotPolling PicoCpuFM68k.not_polling\r
+#define SekNotPollingS68k PicoCpuFS68k.not_polling\r
+\r
#define SekInterrupt(irq) PicoCpuFM68k.interrupts[0]=irq\r
#define SekIrqLevel PicoCpuFM68k.interrupts[0]\r
\r
#define SekIsStoppedS68k() (PicoCpuMS68k.stopped==STOP_LEVEL_STOP)\r
#define SekShouldInterrupt() (CPU_INT_LEVEL > FLAG_INT_MASK)\r
\r
+#define SekNotPolling PicoCpuMM68k.not_polling\r
+#define SekNotPollingS68k PicoCpuMS68k.not_polling\r
+\r
#define SekInterrupt(irq) { \\r
void *oldcontext = m68ki_cpu_p; \\r
m68k_set_context(&PicoCpuMM68k); \\r
#define SekCyclesBurn(c) SekCycleCnt += c\r
#define SekCyclesBurnRun(c) { \\r
SekCyclesLeft -= c; \\r
- if (SekCyclesLeft < 0) \\r
- SekCyclesLeft = 0; \\r
}\r
\r
// note: sometimes may extend timeslice to delay an irq\r
unsigned char sram_reg; // 09 SRAM reg. See SRR_* below\r
unsigned short z80_bank68k; // 0a\r
unsigned short pad0;\r
- unsigned char pad1;\r
+ unsigned char ncart_in; // 0e !cart_in\r
unsigned char z80_reset; // 0f z80 reset held\r
unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay\r
unsigned short eeprom_addr; // EEPROM address register\r
// MCD\r
#include "cd/cd_sys.h"\r
#include "cd/LC89510.h"\r
-#include "cd/gfx_cd.h"\r
+\r
+#define PCM_MIXBUF_LEN ((12500000 / 384) / 50 + 1)\r
\r
struct mcd_pcm\r
{\r
unsigned char enabled; // reg8\r
unsigned char cur_ch;\r
unsigned char bank;\r
- int pad1;\r
+ unsigned int update_cycles;\r
\r
struct pcm_chan // 08, size 0x10\r
{\r
CDD cdd;\r
CDC cdc;\r
_scd scd;\r
- Rot_Comp rot_comp;\r
+ int pcm_mixbuf[PCM_MIXBUF_LEN * 2];\r
+ int pcm_mixpos;\r
+ int pcm_mixbuf_dirty;\r
} mcd_state;\r
\r
// XXX: this will need to be reworked for cart+cd support.\r
\r
// 32X\r
#define P32XS_FM (1<<15)\r
+#define P32XS_nCART (1<< 8)\r
#define P32XS_REN (1<< 7)\r
#define P32XS_nRES (1<< 1)\r
#define P32XS_ADEN (1<< 0)\r
// pico/memory.c\r
PICO_INTERNAL void PicoMemSetupPico(void);\r
\r
+// cd/gfx.c\r
+void gfx_init(void);\r
+void gfx_start(unsigned int base);\r
+void gfx_update(unsigned int cycles);\r
+int gfx_context_save(unsigned char *state);\r
+int gfx_context_load(const unsigned char *state);\r
+\r
+// cd/gfx_dma.c\r
+void DmaSlowCell(unsigned int source, unsigned int a, int len, unsigned char inc);\r
+\r
// cd/memory.c\r
PICO_INTERNAL void PicoMemSetupCD(void);\r
+unsigned int PicoRead8_mcd_io(unsigned int a);\r
+unsigned int PicoRead16_mcd_io(unsigned int a);\r
+void PicoWrite8_mcd_io(unsigned int a, unsigned int d);\r
+void PicoWrite16_mcd_io(unsigned int a, unsigned int d);\r
void pcd_state_loaded_mem(void);\r
\r
// pico.c\r
void pcd_event_schedule_s68k(enum pcd_event event, int after);\r
unsigned int pcd_cycles_m68k_to_s68k(unsigned int c);\r
int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync);\r
+void pcd_run_cpus(int m68k_cycles);\r
+void pcd_soft_reset(void);\r
void pcd_state_loaded(void);\r
\r
+// cd/pcm.c\r
+void pcd_pcm_sync(unsigned int to);\r
+void pcd_pcm_update(int *buffer, int length, int stereo);\r
+void pcd_pcm_write(unsigned int a, unsigned int d);\r
+unsigned int pcd_pcm_read(unsigned int a);\r
+\r
// pico/pico.c\r
PICO_INTERNAL void PicoInitPico(void);\r
PICO_INTERNAL void PicoReratePico(void);\r
\r
\r
// videoport.c\r
+extern int line_base_cycles;\r
PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d);\r
PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a);\r
PICO_INTERNAL_ASM unsigned int PicoVideoRead8(unsigned int a);\r
unsigned int sh2_peripheral_read8(unsigned int a, SH2 *sh2);\r
unsigned int sh2_peripheral_read16(unsigned int a, SH2 *sh2);\r
unsigned int sh2_peripheral_read32(unsigned int a, SH2 *sh2);\r
-void sh2_peripheral_write8(unsigned int a, unsigned int d, SH2 *sh2);\r
-void sh2_peripheral_write16(unsigned int a, unsigned int d, SH2 *sh2);\r
-void sh2_peripheral_write32(unsigned int a, unsigned int d, SH2 *sh2);\r
+void REGPARM(3) sh2_peripheral_write8(unsigned int a, unsigned int d, SH2 *sh2);\r
+void REGPARM(3) sh2_peripheral_write16(unsigned int a, unsigned int d, SH2 *sh2);\r
+void REGPARM(3) sh2_peripheral_write32(unsigned int a, unsigned int d, SH2 *sh2);\r
\r
#else\r
#define Pico32xInit()\r
#define cdprintf(x...)\r
#endif\r
\r
-#ifdef __i386__\r
+#if defined(__GNUC__) && defined(__i386__)\r
#define REGPARM(x) __attribute__((regparm(x)))\r
#else\r
#define REGPARM(x)\r