32x: sh2 irqs (irls), preliminary DMAC implementation

[picodrive.git] / pico / pico_int.h

diff --git a/pico/pico_int.h b/pico/pico_int.h
index d73041e..afcc838 100644 (file)
--- a/pico/pico_int.h
+++ b/pico/pico_int.h
@@ -234,11 +234,11 @@ SH2 msh2, ssh2;
 #define ash2_pc() msh2.ppc\r
 #define ash2_end_run(after) sh2_icount = after\r
 \r
-#define msh2_pc() msh2.ppc\r
-#define ssh2_pc() ssh2.ppc\r
-\r
-#define msh2_reg(x) msh2.r[x]\r
-#define ssh2_reg(x) ssh2.r[x]\r
+#define sh2_pc(c)     (c) ? ssh2.ppc : msh2.ppc\r
+#define sh2_reg(c, x) (c) ? ssh2.r[x] : msh2.r[x]\r
+#define sh2_gbr(c)    (c) ? ssh2.gbr : msh2.gbr\r
+#define sh2_vbr(c)    (c) ? ssh2.vbr : msh2.vbr\r
+#define sh2_sr(c)     (c) ? ssh2.sr : msh2.sr\r
 \r
 // ---------------------------------------------------------\r
 \r
@@ -405,10 +405,13 @@ typedef struct
 // 32X\r
 #define P32XS_FM    (1<<15)\r
 #define P32XS2_ADEN (1<< 9)\r
+#define P32XS_FULL  (1<< 7)\r
+#define P32XS_68S   (1<< 2)\r
+#define P32XS_RV    (1<< 0)\r
 \r
 #define P32XV_nPAL  (1<<15)\r
 #define P32XV_PRI   (1<< 7)\r
-#define P32XV_Mx    (3<< 0)\r
+#define P32XV_Mx    (3<< 0) // display mode mask\r
 \r
 #define P32XV_VBLK  (1<<15)\r
 #define P32XV_HBLK  (1<<14)\r
@@ -416,9 +419,21 @@ typedef struct
 #define P32XV_nFEN  (1<< 1)\r
 #define P32XV_FS    (1<< 0)\r
 \r
-#define P32XF_68KPOLL  (1 << 0)\r
-#define P32XF_MSH2POLL (1 << 1)\r
-#define P32XF_SSH2POLL (1 << 2)\r
+#define P32XF_68KPOLL   (1 << 0)\r
+#define P32XF_MSH2POLL  (1 << 1)\r
+#define P32XF_SSH2POLL  (1 << 2)\r
+#define P32XF_68KVPOLL  (1 << 3)\r
+#define P32XF_MSH2VPOLL (1 << 4)\r
+#define P32XF_SSH2VPOLL (1 << 5)\r
+\r
+#define P32XI_VRES (1 << 14/2) // IRL/2\r
+#define P32XI_VINT (1 << 12/2)\r
+#define P32XI_HINT (1 << 10/2)\r
+#define P32XI_CMD  (1 <<  8/2)\r
+#define P32XI_PWM  (1 <<  6/2)\r
+\r
+// real one is 4*2, but we use more because we don't lockstep\r
+#define DMAC_FIFO_LEN (4*4)\r
 \r
 struct Pico32x\r
 {\r
@@ -428,6 +443,11 @@ struct Pico32x
   unsigned char dirty_pal;\r
   unsigned char pad[2];\r
   unsigned int emu_flags;\r
+  unsigned char sh2irq_mask[2];\r
+  unsigned char sh2irqi[2];      // individual\r
+  unsigned int sh2irqs;          // common irqs\r
+  unsigned short dmac_fifo[DMAC_FIFO_LEN];\r
+  unsigned int dmac_ptr;\r
 };\r
 \r
 struct Pico32xMem\r
@@ -439,6 +459,7 @@ struct Pico32xMem
   unsigned char  sh2_rom_s[0x400];\r
   unsigned short pal[0x100];\r
   unsigned short pal_native[0x100]; // converted to native (for renderer)\r
+  unsigned int   sh2_peri_regs[2][0x200/4]; // periphereal regs of SH2s\r
 };\r
 \r
 // area.c\r
@@ -634,6 +655,7 @@ void PicoReset32x(void);
 void Pico32xStartup(void);\r
 void PicoUnload32x(void);\r
 void PicoFrame32x(void);\r
+void p32x_update_irls(void);\r
 \r
 // 32x/memory.c\r
 struct Pico32xMem *Pico32xMem;\r
@@ -643,6 +665,7 @@ void PicoWrite8_32x(unsigned int a, unsigned int d);
 void PicoWrite16_32x(unsigned int a, unsigned int d);\r
 void PicoMemSetup32x(void);\r
 void Pico32xSwapDRAM(int b);\r
+void p32x_poll_event(int is_vdp);\r
 \r
 // 32x/draw.c\r
 void FinalizeLine32xRGB555(int sh, int line);\r