#define sh2_reg(c, x) (c) ? ssh2.r[x] : msh2.r[x]\r
#define sh2_gbr(c) (c) ? ssh2.gbr : msh2.gbr\r
#define sh2_vbr(c) (c) ? ssh2.vbr : msh2.vbr\r
-#define sh2_sr(c) (c) ? ssh2.sr : msh2.sr\r
+#define sh2_sr(c) (((c) ? ssh2.sr : msh2.sr) & 0xfff)\r
\r
#define sh2_set_gbr(c, v) \\r
{ if (c) ssh2.gbr = v; else msh2.gbr = v; }\r
#define DMAC_FIFO_LEN (4*4)\r
#define PWM_BUFF_LEN 1024 // in one channel samples\r
\r
+#define SH2_DRCBLK_RAM_SHIFT 1\r
+#define SH2_DRCBLK_DA_SHIFT 1\r
+\r
struct Pico32x\r
{\r
unsigned short regs[0x20];\r
struct Pico32xMem\r
{\r
unsigned char sdram[0x40000];\r
+#ifdef DRC_SH2\r
+ unsigned short drcblk_ram[1 << (18 - SH2_DRCBLK_RAM_SHIFT)];\r
+#endif\r
unsigned short dram[2][0x20000/2]; // AKA fb\r
unsigned char m68k_rom[0x10000]; // 0x100; using M68K_BANK_SIZE\r
unsigned char data_array[2][0x1000]; // cache in SH2s (can be used as RAM)\r
+#ifdef DRC_SH2\r
+ unsigned short drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)];\r
+#endif\r
unsigned char sh2_rom_m[0x800];\r
unsigned char sh2_rom_s[0x400];\r
unsigned short pal[0x100];\r
return (0x09 <= c && c <= 0x0d) || c == ' ';\r
}\r
\r
+#ifndef ARRAY_SIZE\r
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))\r
+#endif\r
+\r
// emulation event logging\r
#ifndef EL_LOGMASK\r
#define EL_LOGMASK 0\r