32x: more memhandler improvements

[picodrive.git] / pico / pico_int.h

diff --git a/pico/pico_int.h b/pico/pico_int.h
index d636579..e71245a 100644 (file)
--- a/pico/pico_int.h
+++ b/pico/pico_int.h
@@ -251,6 +251,7 @@ extern SH2 sh2s[2];
   } \\r
 } while (0)\r
 # define sh2_cycles_left(sh2) (sh2)->icount\r
+# define sh2_burn_cycles(sh2, n) (sh2)->icount -= n\r
 # define sh2_pc(sh2) (sh2)->ppc\r
 #else\r
 # define sh2_end_run(sh2, after_) do { \\r
@@ -262,6 +263,7 @@ extern SH2 sh2s[2];
   } \\r
 } while (0)\r
 # define sh2_cycles_left(sh2) ((signed int)(sh2)->sr >> 12)\r
+# define sh2_burn_cycles(sh2, n) (sh2)->sr -= ((n) << 12)\r
 # define sh2_pc(sh2) (sh2)->pc\r
 #endif\r
 \r
@@ -281,6 +283,9 @@ extern SH2 sh2s[2];
 #define sh2_set_vbr(c, v) \\r
   { if (c) ssh2.vbr = v; else msh2.vbr = v; }\r
 \r
+#define elprintf_sh2(sh2, w, f, ...) \\r
+       elprintf(w,"%csh2 "f,(sh2)->is_slave?'s':'m',##__VA_ARGS__)\r
+\r
 // ---------------------------------------------------------\r
 \r
 // main oscillator clock which controls timing\r
@@ -348,7 +353,7 @@ struct Pico
   unsigned short vsram[0x40];  // 0x22180\r
 \r
   unsigned char *rom;          // 0x22200\r
-  unsigned int romsize;        // 0x22204\r
+  unsigned int romsize;        // 0x22204 (on 32bits)\r
 \r
   struct PicoMisc m;\r
   struct PicoVideo video;\r
@@ -593,7 +598,6 @@ unsigned int PicoRead8_io(unsigned int a);
 unsigned int PicoRead16_io(unsigned int a);\r
 void PicoWrite8_io(unsigned int a, unsigned int d);\r
 void PicoWrite16_io(unsigned int a, unsigned int d);\r
-void p32x_dreq1_trigger(void);\r
 \r
 // pico/memory.c\r
 PICO_INTERNAL void PicoMemSetupPico(void);\r
@@ -744,6 +748,7 @@ extern struct Pico32x Pico32x;
 enum p32x_event {\r
   P32X_EVENT_PWM,\r
   P32X_EVENT_FILLEND,\r
+  P32X_EVENT_HINT,\r
   P32X_EVENT_COUNT,\r
 };\r
 extern unsigned int event_times[P32X_EVENT_COUNT];\r
@@ -758,9 +763,12 @@ void Pico32xStateLoaded(int is_early);
 void p32x_sync_sh2s(unsigned int m68k_target);\r
 void p32x_sync_other_sh2(SH2 *sh2, unsigned int m68k_target);\r
 void p32x_update_irls(SH2 *active_sh2, int m68k_cycles);\r
+void p32x_trigger_irq(SH2 *sh2, int m68k_cycles, unsigned int mask);\r
+void p32x_update_cmd_irq(SH2 *sh2, int m68k_cycles);\r
 void p32x_reset_sh2s(void);\r
 void p32x_event_schedule(unsigned int now, enum p32x_event event, int after);\r
 void p32x_event_schedule_sh2(SH2 *sh2, enum p32x_event event, int after);\r
+void p32x_schedule_hint(SH2 *sh2, int m68k_cycles);\r
 \r
 // 32x/memory.c\r
 struct Pico32xMem *Pico32xMem;\r
@@ -797,6 +805,7 @@ void p32x_pwm_update(int *buf32, int length, int stereo);
 void p32x_pwm_ctl_changed(void);\r
 void p32x_pwm_schedule(unsigned int m68k_now);\r
 void p32x_pwm_schedule_sh2(SH2 *sh2);\r
+void p32x_pwm_sync_to_sh2(SH2 *sh2);\r
 void p32x_pwm_irq_event(unsigned int m68k_now);\r
 void p32x_pwm_state_loaded(void);\r
 \r