gpu.dma.h = size_word >> 16;
gpu.dma.offset = 0;
- if (is_read)
+ renderer_flush_queues();
+ if (is_read) {
gpu.status.img = 1;
+ // XXX: wrong for width 1
+ memcpy(&gpu.gp0, VRAM_MEM_XY(gpu.dma.x, gpu.dma.y), 4);
+ }
else {
- renderer_flush_queues();
renderer_invalidate_caches(gpu.dma.x, gpu.dma.y, gpu.dma.w, gpu.dma.h);
}
uint32_t addr, *list;
uint32_t *llist_entry = NULL;
int len, left, count;
- long dma_words = 0;
+ long cpu_cycles = 0;
if (unlikely(gpu.cmd_len > 0))
flush_cmd_buffer();
// ff7 sends it's main list twice, detect this
if (*gpu.state.frame_count == gpu.state.last_list.frame &&
*gpu.state.hcnt - gpu.state.last_list.hcnt <= 1 &&
- gpu.state.last_list.words > 1024)
+ gpu.state.last_list.cycles > 2048)
{
llist_entry = rambase + (gpu.state.last_list.addr & 0x1fffff) / 4;
*llist_entry |= 0x800000;
list = rambase + (addr & 0x1fffff) / 4;
len = list[0] >> 24;
addr = list[0] & 0xffffff;
- dma_words += 1 + len;
+ cpu_cycles += 10;
+ if (len > 0)
+ cpu_cycles += 5 + len;
log_io(".chain %08x #%d\n", (list - rambase) * 4, len);
gpu.state.last_list.frame = *gpu.state.frame_count;
gpu.state.last_list.hcnt = *gpu.state.hcnt;
- gpu.state.last_list.words = dma_words;
+ gpu.state.last_list.cycles = cpu_cycles;
gpu.state.last_list.addr = start_addr;
- return dma_words;
+ return cpu_cycles;
}
void GPUreadDataMem(uint32_t *mem, int count)
uint32_t GPUreadData(void)
{
- log_io("gpu_read\n");
+ uint32_t ret;
if (unlikely(gpu.cmd_len > 0))
flush_cmd_buffer();
+ ret = gpu.gp0;
if (gpu.dma.h)
- do_vram_io(&gpu.gp0, 1, 1);
+ do_vram_io(&ret, 1, 1);
- return gpu.gp0;
+ log_io("gpu_read %08x\n", ret);
+ return ret;
}
uint32_t GPUreadStatus(void)