uint32_t lcf:1; // 31
};
} status;
+ uint32_t gp0;
+ uint32_t ex_regs[8];
struct {
int hres, vres;
int x, y, w, h;
int cmd_len;
const uint32_t *lcf_hc;
uint32_t zero;
+ struct {
+ uint32_t fb_dirty:1;
+ uint32_t frame_count;
+ uint32_t *hcnt;
+ struct {
+ uint32_t addr;
+ uint32_t words;
+ uint32_t frame;
+ uint32_t hcnt;
+ } last_list;
+ } state;
+ struct {
+ int32_t set:3; /* -1 auto, 0 off, 1 fixed */
+ uint32_t active:1;
+ uint32_t frame_ready:1;
+ uint32_t skipped_blits:5;
+ const int *advice;
+ } frameskip;
};
extern struct psx_gpu gpu;
void do_cmd_list(uint32_t *list, int count);
+int renderer_init(void);
+void renderer_sync_ecmds(uint32_t * ecmds);
+void renderer_invalidate_caches(int x, int y, int w, int h);
+void renderer_flush_queues(void);
+
int vout_init(void);
int vout_finish(void);