{
int ret;
+#if defined(__arm__) && defined(NEON_BUILD) && !defined(SIMD_BUILD)
+ // the asm doesn't bother to save callee-save vector regs, so do it here
+ __asm__ __volatile__("":::"q4","q5","q6","q7");
+#endif
+
if (gpu.state.enhancement_active)
ret = gpu_parse_enhanced(&egpu, list, count * 4, (u32 *)last_cmd);
else
ret = gpu_parse(&egpu, list, count * 4, (u32 *)last_cmd);
+#if defined(__arm__) && defined(NEON_BUILD) && !defined(SIMD_BUILD)
+ __asm__ __volatile__("":::"q4","q5","q6","q7");
+#endif
+
ex_regs[1] &= ~0x1ff;
ex_regs[1] |= egpu.texture_settings & 0x1ff;
return ret;
#define ENHANCEMENT_BUF_SIZE (1024 * 1024 * 2 * 4 + 4096 * 2)
static uint16_t *get_enhancement_bufer(int *x, int *y, int *w, int *h,
- int *stride, int *mask)
+ int *vram_h)
{
uint16_t *ret = select_enhancement_buf_ptr(&egpu, *x);
*y *= 2;
*w = *w * 2;
*h = *h * 2;
- *stride *= 2;
- *mask = 1024 * 1024 - 1;
+ *vram_h = 1024;
return ret;
}
void renderer_update_caches(int x, int y, int w, int h)
{
update_texture_cache_region(&egpu, x, y, x + w - 1, y + h - 1);
- if (gpu.state.enhancement_active && !gpu.status.rgb24)
+ if (gpu.state.enhancement_active && !(gpu.status & PSX_GPU_STATUS_RGB24))
sync_enhancement_buffers(x, y, w, h);
}
if (egpu.enhancement_x_threshold != gpu.screen.hres)
{
egpu.enhancement_x_threshold = gpu.screen.hres;
- update_enhancement_buf_table(&egpu);
+ update_enhancement_buf_table_from_hres(&egpu);
}
}
if (gpu.mmap != NULL && egpu.enhancement_buf_ptr == NULL)
map_enhancement_buffer();
+ if (cbs->pl_set_gpu_caps)
+ cbs->pl_set_gpu_caps(GPU_CAP_SUPPORTS_2X);
}