try to make drc more configurable

and break it more I guess

diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index 57684cc..6d0a40d 100644 (file)
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -24,7 +24,9 @@ extern int pcaddr;
 extern int pending_exception;
 extern int branch_target;
 extern uint64_t readmem_dword;
+#ifdef MUPEN64
 extern precomp_instr fake_pc;
+#endif
 extern void *dynarec_local;
 extern u_int memory_map[1048576];
 extern u_int mini_ht[32][2];
@@ -902,10 +904,16 @@ void emit_zeroreg(int rt)
 
 void emit_loadreg(int r, int hr)
 {
+#ifdef FORCE32
+  if(r&64) {
+    printf("64bit load in 32bit mode!\n");
+    exit(1);
+  }
+#endif
   if((r&63)==0)
     emit_zeroreg(hr);
   else {
-    int addr=((int)reg)+((r&63)<<3)+((r&64)>>4);
+    int addr=((int)reg)+((r&63)<<REG_SHIFT)+((r&64)>>4);
     if((r&63)==HIREG) addr=(int)&hi+((r&64)>>4);
     if((r&63)==LOREG) addr=(int)&lo+((r&64)>>4);
     if(r==CCREG) addr=(int)&cycle_count;
@@ -920,7 +928,13 @@ void emit_loadreg(int r, int hr)
 }
 void emit_storereg(int r, int hr)
 {
-  int addr=((int)reg)+((r&63)<<3)+((r&64)>>4);
+#ifdef FORCE32
+  if(r&64) {
+    printf("64bit store in 32bit mode!\n");
+    exit(1);
+  }
+#endif
+  int addr=((int)reg)+((r&63)<<REG_SHIFT)+((r&64)>>4);
   if((r&63)==HIREG) addr=(int)&hi+((r&64)>>4);
   if((r&63)==LOREG) addr=(int)&lo+((r&64)>>4);
   if(r==CCREG) addr=(int)&cycle_count;
@@ -2669,8 +2683,12 @@ do_writestub(int n)
   if(type==STOREW_STUB)
     emit_writeword(rt,(int)&word);
   if(type==STORED_STUB) {
+#ifndef FORCE32
     emit_writeword(rt,(int)&dword);
     emit_writeword(r?rth:rt,(int)&dword+4);
+#else
+    printf("STORED_STUB\n");
+#endif
   }
   //emit_pusha();
   save_regs(reglist);
@@ -2736,8 +2754,12 @@ inline_writestub(int type, int i, u_int addr, signed char regmap[], int target,
   if(type==STOREW_STUB)
     emit_writeword(rt,(int)&word);
   if(type==STORED_STUB) {
+#ifndef FORCE32
     emit_writeword(rt,(int)&dword);
     emit_writeword(target?rth:rt,(int)&dword+4);
+#else
+    printf("STORED_STUB\n");
+#endif
   }
   //emit_pusha();
   save_regs(reglist);
@@ -2843,7 +2865,7 @@ do_cop1stub(int n)
   assem_debug("do_cop1stub %x\n",start+stubs[n][3]*4);
   set_jump_target(stubs[n][1],(int)out);
   int i=stubs[n][3];
-  int rs=stubs[n][4];
+//  int rs=stubs[n][4];
   struct regstat *i_regs=(struct regstat *)stubs[n][5];
   int ds=stubs[n][6];
   if(!ds) {
@@ -3194,10 +3216,12 @@ void cop0_assemble(int i,struct regstat *i_regs)
     char copr=(source[i]>>11)&0x1f;
     //assert(t>=0); // Why does this happen?  OOT is weird
     if(t>=0) {
+#ifdef MUPEN64 /// FIXME
       emit_addimm(FP,(int)&fake_pc-(int)&dynarec_local,0);
       emit_movimm((source[i]>>11)&0x1f,1);
       emit_writeword(0,(int)&PC);
       emit_writebyte(1,(int)&(fake_pc.f.r.nrd));
+#endif
       if(copr==9) {
         emit_readword((int)&last_count,ECX);
         emit_loadreg(CCREG,HOST_CCREG); // TODO: do proper reg alloc
@@ -3216,10 +3240,12 @@ void cop0_assemble(int i,struct regstat *i_regs)
     assert(s>=0);
     emit_writeword(s,(int)&readmem_dword);
     wb_register(rs1[i],i_regs->regmap,i_regs->dirty,i_regs->is32);
+#ifdef MUPEN64 /// FIXME
     emit_addimm(FP,(int)&fake_pc-(int)&dynarec_local,0);
     emit_movimm((source[i]>>11)&0x1f,1);
     emit_writeword(0,(int)&PC);
     emit_writebyte(1,(int)&(fake_pc.f.r.nrd));
+#endif
     if(copr==9||copr==11||copr==12) {
       emit_readword((int)&last_count,ECX);
       emit_loadreg(CCREG,HOST_CCREG); // TODO: do proper reg alloc
@@ -3264,6 +3290,7 @@ void cop0_assemble(int i,struct regstat *i_regs)
   else
   {
     assert(opcode2[i]==0x10);
+#ifndef DISABLE_TLB
     if((source[i]&0x3f)==0x01) // TLBR
       emit_call((int)TLBR);
     if((source[i]&0x3f)==0x02) // TLBWI
@@ -3280,6 +3307,7 @@ void cop0_assemble(int i,struct regstat *i_regs)
     }
     if((source[i]&0x3f)==0x08) // TLBP
       emit_call((int)TLBP);
+#endif
     if((source[i]&0x3f)==0x18) // ERET
     {
       int count=ccadj[i];
@@ -3290,8 +3318,20 @@ void cop0_assemble(int i,struct regstat *i_regs)
   }
 }
 
+void cop1_unusable(int i, struct regstat *i_regs)
+{
+  // XXX: should just just do the exception instead
+  if(!cop1_usable) {
+    int jaddr=(int)out;
+    emit_jmp(0);
+    add_stub(FP_STUB,jaddr,(int)out,i,0,(int)i_regs,is_delayslot,0);
+    cop1_usable=1;
+  }
+}
+
 void cop1_assemble(int i,struct regstat *i_regs)
 {
+#ifndef DISABLE_COP1
   // Check cop1 unusable
   if(!cop1_usable) {
     signed char rs=get_reg(i_regs->regmap,CSREG);
@@ -3356,10 +3396,14 @@ void cop1_assemble(int i,struct regstat *i_regs)
       //emit_fldcw_indexed((int)&rounding_modes,temp);
     }
   }
+#else
+  cop1_unusable(i, i_regs);
+#endif
 }
 
 void fconv_assemble_arm(int i,struct regstat *i_regs)
 {
+#ifndef DISABLE_COP1
   signed char temp=get_reg(i_regs->regmap,-1);
   assert(temp>=0);
   // Check cop1 unusable
@@ -3572,11 +3616,15 @@ void fconv_assemble_arm(int i,struct regstat *i_regs)
   }
   
   restore_regs(reglist);
+#else
+  cop1_unusable(i, i_regs);
+#endif
 }
 #define fconv_assemble fconv_assemble_arm
 
 void fcomp_assemble(int i,struct regstat *i_regs)
 {
+#ifndef DISABLE_COP1
   signed char fs=get_reg(i_regs->regmap,FSREG);
   signed char temp=get_reg(i_regs->regmap,-1);
   assert(temp>=0);
@@ -3701,10 +3749,14 @@ void fcomp_assemble(int i,struct regstat *i_regs)
   }
   restore_regs(reglist);
   emit_loadreg(FSREG,fs);
+#else
+  cop1_unusable(i, i_regs);
+#endif
 }
 
 void float_assemble(int i,struct regstat *i_regs)
 {
+#ifndef DISABLE_COP1
   signed char temp=get_reg(i_regs->regmap,-1);
   assert(temp>=0);
   // Check cop1 unusable
@@ -3894,6 +3946,9 @@ void float_assemble(int i,struct regstat *i_regs)
     }
     restore_regs(reglist);
   }
+#else
+  cop1_unusable(i, i_regs);
+#endif
 }
 
 void multdiv_assemble_arm(int i,struct regstat *i_regs)
@@ -4346,8 +4401,10 @@ void wb_invalidate_arm(signed char pre[],signed char entry[],uint64_t dirty,uint
 
 // CPU-architecture-specific initialization
 void arch_init() {
+#ifndef DISABLE_COP1
   rounding_modes[0]=0x0<<22; // round
   rounding_modes[1]=0x3<<22; // trunc
   rounding_modes[2]=0x1<<22; // ceil
   rounding_modes[3]=0x2<<22; // floor
+#endif
 }

diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h
index cc8b067..a1a2b52 100644 (file)
--- a/libpcsxcore/new_dynarec/assem_arm.h
+++ b/libpcsxcore/new_dynarec/assem_arm.h
@@ -9,6 +9,15 @@
 #define USE_MINI_HT 1
 //#define REG_PREFETCH 1
 #define DISABLE_TLB 1
+//#define MUPEN64
+#define FORCE32 1
+#define DISABLE_COP1 1
+
+#ifdef FORCE32
+#define REG_SHIFT 2
+#else
+#define REG_SHIFT 3
+#endif
 
 /* ARM calling convention:
    r0-r3, r12: caller-save

diff --git a/libpcsxcore/new_dynarec/emu_if.h b/libpcsxcore/new_dynarec/emu_if.h
new file mode 100644 (file)
index 0000000..50dc2a8
--- /dev/null
+++ b/libpcsxcore/new_dynarec/emu_if.h
@@ -0,0 +1,47 @@
+#include "../r3000a.h"
+
+extern char invalid_code[0x100000];
+
+/* weird stuff */
+#define EAX 0
+#define ECX 1
+
+/* same as psxRegs */
+extern int reg[];
+
+/* same as psxRegs.GPR.n.* */
+extern int hi, lo;
+
+/* same as psxRegs.CP0.n.* */
+#define Status   psxRegs.CP0.n.Status
+#define Cause    psxRegs.CP0.n.Cause
+#define EPC      psxRegs.CP0.n.EPC
+#define BadVAddr psxRegs.CP0.n.BadVAddr
+#define Context  psxRegs.CP0.n.Context
+#define EntryHi  psxRegs.CP0.n.EntryHi
+#define Count    psxRegs.CP0.n.Count
+
+/* dummy */
+extern int FCR0, FCR31;
+
+/* mem */
+extern void (*readmem[0x10000])();
+extern void (*readmemb[0x10000])();
+extern void (*readmemh[0x10000])();
+extern void (*readmemd[0x10000])();
+extern void (*writemem[0x10000])();
+extern void (*writememb[0x10000])();
+extern void (*writememh[0x10000])();
+extern void (*writememd[0x10000])();
+
+extern unsigned int address, word;
+extern unsigned char byte;
+extern unsigned short hword;
+
+/* cycles */
+extern unsigned int next_interupt;
+
+/* called by drc */
+void MFC0();
+void MTC0();
+

diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c
index ebdab12..fb42a90 100644 (file)
--- a/libpcsxcore/new_dynarec/new_dynarec.c
+++ b/libpcsxcore/new_dynarec/new_dynarec.c
@@ -22,14 +22,7 @@
 #include <stdint.h> //include for uint64_t
 #include <assert.h>
 
-#include "../recomp.h"
-#include "../recomph.h" //include for function prototypes
-#include "../macros.h"
-#include "../r4300.h"
-#include "../ops.h"
-#include "../interupt.h"
-
-#include "../../memory/memory.h"
+#include "emu_if.h" //emulator interface
 
 #include <sys/mman.h>
 
@@ -1969,14 +1962,6 @@ int rchecksum()
     sum^=((u_int *)reg)[i];
   return sum;
 }
-int fchecksum()
-{
-  int i;
-  int sum=0;
-  for(i=0;i<64;i++)
-    sum^=((u_int *)reg_cop1_fgr_64)[i];
-  return sum;
-}
 void rlist()
 {
   int i;
@@ -1984,10 +1969,12 @@ void rlist()
   for(i=0;i<32;i++)
     printf("r%d:%8x%8x ",i,((int *)(reg+i))[1],((int *)(reg+i))[0]);
   printf("\n");
+#ifndef DISABLE_COP1
   printf("TRACE: ");
   for(i=0;i<32;i++)
     printf("f%d:%8x%8x ",i,((int*)reg_cop1_simple[i])[1],*((int*)reg_cop1_simple[i]));
   printf("\n");
+#endif
 }
 
 void enabletrace()
@@ -3323,6 +3310,7 @@ void storelr_assemble(int i,struct regstat *i_regs)
 
 void c1ls_assemble(int i,struct regstat *i_regs)
 {
+#ifndef DISABLE_COP1
   int s,th,tl;
   int temp,ar;
   int map=-1;
@@ -3497,6 +3485,9 @@ void c1ls_assemble(int i,struct regstat *i_regs)
     emit_call((int)memdebug);
     emit_popa();
   }/**/
+#else
+  cop1_unusable(i, i_regs);
+#endif
 }
 
 #ifndef multdiv_assemble
@@ -7393,10 +7384,12 @@ void new_dynarec_init()
             PROT_READ | PROT_WRITE | PROT_EXEC,
             MAP_FIXED | MAP_PRIVATE | MAP_ANONYMOUS,
             -1, 0) <= 0) {printf("mmap() failed\n");}
+#ifdef MUPEN64
   rdword=&readmem_dword;
   fake_pc.f.r.rs=&readmem_dword;
   fake_pc.f.r.rt=&readmem_dword;
   fake_pc.f.r.rd=&readmem_dword;
+#endif
   int n;
   for(n=0x80000;n<0x80800;n++)
     invalid_code[n]=1;
@@ -7486,11 +7479,14 @@ int new_recompile_block(int addr)
   //rlist();
   start = (u_int)addr&~3;
   //assert(((u_int)addr&1)==0);
+#ifdef MUPEN64
   if ((int)addr >= 0xa4000000 && (int)addr < 0xa4001000) {
     source = (u_int *)((u_int)SP_DMEM+start-0xa4000000);
     pagelimit = 0xa4001000;
   }
-  else if ((int)addr >= 0x80000000 && (int)addr < 0x80800000) {
+  else
+#endif
+  if ((int)addr >= 0x80000000 && (int)addr < 0x80800000) {
     source = (u_int *)((u_int)rdram+start-0x80000000);
     pagelimit = 0x80800000;
   }