move some gpu status handling to core

this removes need to update each gpu plugin when this stuff is changed

diff --git a/libpcsxcore/gpu.h b/libpcsxcore/gpu.h
new file mode 100644 (file)
index 0000000..d02dca4
--- /dev/null
+++ b/libpcsxcore/gpu.h
@@ -0,0 +1,20 @@
+
+/*
+ * q: Why bother with GPU stuff in a plugin-based emu core?
+ * a: mostly because of busy bits, we have all the needed timing info
+ *    that GPU plugin doesn't.
+ */
+
+#define PSXGPU_LCF   (1<<31)
+#define PSXGPU_nBUSY (1<<26)
+#define PSXGPU_ILACE (1<<22)
+
+#define HW_GPU_STATUS psxHu32ref(0x1814)
+
+// TODO: handle com too
+#define PSXGPU_TIMING_BITS (PSXGPU_LCF | PSXGPU_nBUSY)
+
+#define gpuSyncPluginSR() { \
+       HW_GPU_STATUS &= PSXGPU_TIMING_BITS; \
+       HW_GPU_STATUS |= GPU_readStatus() & ~PSXGPU_TIMING_BITS; \
+}

diff --git a/libpcsxcore/misc.c b/libpcsxcore/misc.c
index 38e6385..034e5e0 100644 (file)
--- a/libpcsxcore/misc.c
+++ b/libpcsxcore/misc.c
@@ -24,6 +24,7 @@
 #include "misc.h"
 #include "cdrom.h"
 #include "mdec.h"
+#include "gpu.h"
 #include "ppf.h"
 
 char CdromId[10] = "";
@@ -576,6 +577,8 @@ int LoadState(const char *file) {
        gzread(f, gpufP, sizeof(GPUFreeze_t));
        GPU_freeze(0, gpufP);
        free(gpufP);
+       if (HW_GPU_STATUS == 0)
+               HW_GPU_STATUS = GPU_readStatus();
 
        // spu
        gzread(f, &Size, 4);

diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
index c9fb5a8..2306ca7 100644 (file)
--- a/libpcsxcore/new_dynarec/pcsxmem.c
+++ b/libpcsxcore/new_dynarec/pcsxmem.c
@@ -10,6 +10,7 @@
 #include "../psxhw.h"
 #include "../cdrom.h"
 #include "../mdec.h"
+#include "../gpu.h"
 #include "emu_if.h"
 #include "pcsxmem.h"
 
@@ -209,6 +210,19 @@ static void io_spu_write32(u32 value)
        wfunc(a + 2, value >> 16);
 }
 
+static u32 io_gpu_read_status(void)
+{
+       // meh2, syncing for img bit, might want to avoid it..
+       gpuSyncPluginSR();
+       return HW_GPU_STATUS;
+}
+
+static void io_gpu_write_status(u32 value)
+{
+       GPU_writeStatus(value);
+       gpuSyncPluginSR();
+}
+
 static void map_ram_write(void)
 {
        int i;
@@ -346,7 +360,7 @@ void new_dyna_pcsx_mem_init(void)
        map_item(&mem_iortab[IOMEM32(0x1124)], io_rcnt_read_mode2, 1);
        map_item(&mem_iortab[IOMEM32(0x1128)], io_rcnt_read_target2, 1);
 //     map_item(&mem_iortab[IOMEM32(0x1810)], GPU_readData, 1);
-//     map_item(&mem_iortab[IOMEM32(0x1814)], GPU_readStatus, 1);
+       map_item(&mem_iortab[IOMEM32(0x1814)], io_gpu_read_status, 1);
        map_item(&mem_iortab[IOMEM32(0x1820)], mdecRead0, 1);
        map_item(&mem_iortab[IOMEM32(0x1824)], mdecRead1, 1);
 
@@ -392,7 +406,7 @@ void new_dyna_pcsx_mem_init(void)
        map_item(&mem_iowtab[IOMEM32(0x1124)], io_rcnt_write_mode2, 1);
        map_item(&mem_iowtab[IOMEM32(0x1128)], io_rcnt_write_target2, 1);
 //     map_item(&mem_iowtab[IOMEM32(0x1810)], GPU_writeData, 1);
-//     map_item(&mem_iowtab[IOMEM32(0x1814)], GPU_writeStatus, 1);
+       map_item(&mem_iowtab[IOMEM32(0x1814)], io_gpu_write_status, 1);
        map_item(&mem_iowtab[IOMEM32(0x1820)], mdecWrite0, 1);
        map_item(&mem_iowtab[IOMEM32(0x1824)], mdecWrite1, 1);
 
@@ -441,11 +455,9 @@ void new_dyna_pcsx_mem_reset(void)
 
        // plugins might change so update the pointers
        map_item(&mem_iortab[IOMEM32(0x1810)], GPU_readData, 1);
-       map_item(&mem_iortab[IOMEM32(0x1814)], GPU_readStatus, 1);
 
        for (i = 0x1c00; i < 0x1e00; i += 2)
                map_item(&mem_iortab[IOMEM16(i)], SPU_readRegister, 1);
 
        map_item(&mem_iowtab[IOMEM32(0x1810)], GPU_writeData, 1);
-       map_item(&mem_iowtab[IOMEM32(0x1814)], GPU_writeStatus, 1);
 }

diff --git a/libpcsxcore/psxbios.c b/libpcsxcore/psxbios.c
index 0e53d9f..e4fcad3 100644 (file)
--- a/libpcsxcore/psxbios.c
+++ b/libpcsxcore/psxbios.c
@@ -25,6 +25,7 @@
 
 #include "psxbios.h"
 #include "psxhw.h"
+#include "gpu.h"
 
 #undef SysPrintf
 #define SysPrintf if (Config.PsxOut) printf
@@ -1118,6 +1119,7 @@ void psxBios_mem2vram() { // 0x47
 
 void psxBios_SendGPU() { // 0x48
        GPU_writeStatus(a0);
+       gpuSyncPluginSR();
        pc0 = ra;
 }
 

diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c
index 177ccb7..e8d2796 100644 (file)
--- a/libpcsxcore/psxcounters.c
+++ b/libpcsxcore/psxcounters.c
@@ -22,6 +22,7 @@
  */
 
 #include "psxcounters.h"
+#include "gpu.h"
 #include "debug.h"
 
 /******************************************************************************/
@@ -75,6 +76,7 @@ static u32 spuSyncCount = 0;
 static u32 hsync_steps = 0;
 static u32 gpu_wants_hcnt = 0;
 static u32 base_cycle = 0;
+static u32 frame_counter = 0;
 
 u32 psxNextCounter = 0, psxNextsCounter = 0;
 
@@ -294,7 +296,9 @@ void psxRcntUpdate()
         if( hSyncCount == VBlankStart[Config.PsxType] )
         {
             GPU_vBlank( 1, &hSyncCount, &gpu_wants_hcnt );
-            
+            //if( !(HW_GPU_STATUS & PSXGPU_ILACE) ) // hmh
+                HW_GPU_STATUS |= PSXGPU_LCF;
+
             // For the best times. :D
             //setIrq( 0x01 );
         }
@@ -303,12 +307,17 @@ void psxRcntUpdate()
         if( hSyncCount >= (Config.VSyncWA ? HSyncTotal[Config.PsxType] / BIAS : HSyncTotal[Config.PsxType]) )
         {
             hSyncCount = 0;
+            frame_counter++;
 
             GPU_vBlank( 0, &hSyncCount, &gpu_wants_hcnt );
             setIrq( 0x01 );
 
             EmuUpdate();
             GPU_updateLace();
+
+            HW_GPU_STATUS &= ~PSXGPU_LCF;
+            if( HW_GPU_STATUS & PSXGPU_ILACE )
+                HW_GPU_STATUS |= frame_counter << 31;
         }
 
         // Schedule next call, in hsyncs

diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
index 54e03f6..bcedb97 100644 (file)
--- a/libpcsxcore/psxhw.c
+++ b/libpcsxcore/psxhw.c
@@ -24,6 +24,7 @@
 #include "psxhw.h"
 #include "mdec.h"
 #include "cdrom.h"
+#include "gpu.h"
 
 //#undef PSXHW_LOG
 //#define PSXHW_LOG printf
@@ -37,6 +38,7 @@ void psxHwReset() {
        mdecInit(); // initialize mdec decoder
        cdrReset();
        psxRcntInit();
+       HW_GPU_STATUS = 0x14802000;
 }
 
 u8 psxHwRead8(u32 add) {
@@ -238,7 +240,8 @@ u32 psxHwRead32(u32 add) {
 #endif
                        return hard;
                case 0x1f801814:
-                       hard = GPU_readStatus();
+                       gpuSyncPluginSR();
+                       hard = HW_GPU_STATUS;
 #ifdef PSXHW_LOG
                        PSXHW_LOG("GPU STATUS 32bit read %x\n", hard);
 #endif
@@ -682,7 +685,9 @@ void psxHwWrite32(u32 add, u32 value) {
 #ifdef PSXHW_LOG
                        PSXHW_LOG("GPU STATUS 32bit write %x\n", value);
 #endif
-                       GPU_writeStatus(value); return;
+                       GPU_writeStatus(value);
+                       gpuSyncPluginSR();
+                       return;
 
                case 0x1f801820:
                        mdecWrite0(value); break;