2 // Cyclone 68000 Emulator - Header File
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4 // Copyright (c) 2004,2011 FinalDave (emudave (at) gmail.com)
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5 // Copyright (c) 2005-2011 GraÅžvydas "notaz" Ignotas (notasas (at) gmail.com)
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7 // This code is licensed under the GNU General Public License version 2.0 and the MAME License.
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8 // You can choose the license that has the most advantages for you.
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10 // SVN repository can be found at http://code.google.com/p/cyclone68000/
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13 #ifndef __CYCLONE_H__
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14 #define __CYCLONE_H__
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20 extern int CycloneVer; // Version number of library
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22 extern long CycloneJumpTab[65536]; // default jump table
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26 unsigned int d[8]; // [r7,#0x00]
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27 unsigned int a[8]; // [r7,#0x20]
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28 unsigned int pc; // [r7,#0x40] Memory Base (.membase) + 68k PC
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29 unsigned char srh; // [r7,#0x44] Status Register high (T_S__III)
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30 unsigned char not_pol;// [r7,#0x45] not polling
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31 unsigned char flags; // [r7,#0x46] Flags (ARM order: ____NZCV) [68k order is XNZVC]
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32 unsigned char irq; // [r7,#0x47] IRQ level
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33 unsigned int osp; // [r7,#0x48] Other Stack Pointer (USP/SSP)
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34 unsigned int xc; // [r7,#0x4c] Extend flag (bit29: ??X? _)
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35 unsigned int prev_pc; // [r7,#0x50] Set to start address of currently executed opcode + 2 (if enabled in config.h)
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36 unsigned int jumptab; // [r7,#0x54] Jump table pointer
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37 int state_flags; // [r7,#0x58] bit: 0: stopped state, 1: trace state, 2: activity bit, 3: addr error, 4: fatal halt
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38 int cycles; // [r7,#0x5c] Number of cycles to execute - 1. Updates to cycles left after CycloneRun()
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39 int membase; // [r7,#0x60] Memory Base (ARM address minus 68000 address)
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40 unsigned int (*checkpc)(unsigned int pc); // [r7,#0x64] called to recalc Memory Base+pc
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41 unsigned int (*read8 )(unsigned int a); // [r7,#0x68]
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42 unsigned int (*read16 )(unsigned int a); // [r7,#0x6c]
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43 unsigned int (*read32 )(unsigned int a); // [r7,#0x70]
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44 void (*write8 )(unsigned int a,unsigned char d); // [r7,#0x74]
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45 void (*write16)(unsigned int a,unsigned short d); // [r7,#0x78]
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46 void (*write32)(unsigned int a,unsigned int d); // [r7,#0x7c]
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47 unsigned int (*fetch8 )(unsigned int a); // [r7,#0x80]
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48 unsigned int (*fetch16)(unsigned int a); // [r7,#0x84]
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49 unsigned int (*fetch32)(unsigned int a); // [r7,#0x88]
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50 int (*IrqCallback)(int int_level); // [r7,#0x8c] optional irq callback function, see config.h
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51 void (*ResetCallback)(void); // [r7,#0x90] if enabled in config.h, calls this whenever RESET opcode is encountered.
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52 int (*UnrecognizedCallback)(void); // [r7,#0x94] if enabled in config.h, calls this whenever unrecognized opcode is encountered.
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53 void *internal_CycloneEnd; // [r7,#0x98] internal, do not modify
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54 int internal_s_cycles; // [r7,#0x9c] internal, do not modify
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55 void *internal_s_CycloneEnd; // [r7,#0xa0] internal, do not modify
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56 unsigned int internal[3]; // [r7,#0xa4] reserved for internal use, do not change.
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59 // Initialize. Used only if Cyclone was compiled with compressed jumptable, see config.h
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60 #define CycloneInit() \
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61 CycloneInitJT(CycloneJumpTab)
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62 void CycloneInitJT(void *jt);
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65 #define CycloneReset(pcy) \
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66 CycloneResetJT(pcy, CycloneJumpTab)
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67 void CycloneResetJT(struct Cyclone *pcy, void *jt);
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69 // Run cyclone. Cycles should be specified in context (pcy->cycles)
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70 void CycloneRun(struct Cyclone *pcy);
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72 // Utility functions to get and set SR
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73 void CycloneSetSr(struct Cyclone *pcy, unsigned int sr);
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74 unsigned int CycloneGetSr(const struct Cyclone *pcy);
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76 // Generates irq exception if needed (if pcy->irq > mask).
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77 // Returns cycles used for exception if it was generated, 0 otherwise.
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78 int CycloneFlushIrq(struct Cyclone *pcy);
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80 // Functions for saving and restoring state.
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81 // CycloneUnpack() uses checkpc(), so it must be initialized.
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82 // save_buffer must point to buffer of 128 (0x80) bytes of size.
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83 void CyclonePack(const struct Cyclone *pcy, void *save_buffer);
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84 void CycloneUnpack(struct Cyclone *pcy, const void *save_buffer);
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86 // genesis: if 1, switch to normal TAS handlers
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87 #define CycloneSetRealTAS(use_real) \
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88 CycloneSetRealTAS_JT(use_real, CycloneJumpTab)
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89 void CycloneSetRealTAS_JT(int use_real, void *jt);
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92 // These values are special return values for IrqCallback.
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94 // Causes an interrupt autovector (0x18 + interrupt level) to be taken.
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95 // This happens in a real 68K if VPA or AVEC is asserted during an interrupt
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96 // acknowledge cycle instead of DTACK (the most common situation).
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97 #define CYCLONE_INT_ACK_AUTOVECTOR -1
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99 // Causes the spurious interrupt vector (0x18) to be taken
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100 // This happens in a real 68K if BERR is asserted during the interrupt
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101 // acknowledge cycle (i.e. no devices responded to the acknowledge).
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102 #define CYCLONE_INT_ACK_SPURIOUS -2
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106 } // End of extern "C"
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109 #endif // __CYCLONE_H__
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