\r
// This file is part of the Cyclone 68000 Emulator\r
\r
-// Copyright (c) 2011 FinalDave (emudave (at) gmail.com)\r
+// Copyright (c) 2004,2011 FinalDave (emudave (at) gmail.com)\r
+// Copyright (c) 2005-2011 GraÅžvydas "notaz" Ignotas (notasas (at) gmail.com)\r
\r
// This code is licensed under the GNU General Public License version 2.0 and the MAME License.\r
// You can choose the license that has the most advantages for you.\r
\r
// SVN repository can be found at http://code.google.com/p/cyclone68000/\r
\r
+\r
#include "app.h"\r
\r
+int opend_op_changes_cycles, opend_check_interrupt, opend_check_trace;\r
+\r
static unsigned char OpData[16]={0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};\r
\r
-static unsigned short CPU_CALL OpRead16(unsigned int a)\r
+static unsigned short OpRead16(unsigned int a)\r
{\r
return (unsigned short)( (OpData[a&15]<<8) | OpData[(a+1)&15] );\r
}\r
void OpUse(int op,int use)\r
{\r
char text[64]="";\r
- \r
- if (op>=0)\r
- CyJump[op]=use;\r
+ CyJump[op]=use;\r
\r
if (op!=use) return;\r
\r
ot(";@ ---------- [%.4x] %s uses Op%.4x ----------\n",op,text,use);\r
}\r
\r
-void OpFirst()\r
+void OpStart(int op, int sea, int tea, int op_changes_cycles, int supervisor_check)\r
{\r
- ot(" ldrh r8,[r4],#2 ;@ Fetch first opcode\n");\r
- ot(" ldr pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");\r
-}\r
+ int last_op_count=arm_op_count;\r
\r
-void OpStart(int op)\r
-{\r
Cycles=0;\r
OpUse(op,op); // This opcode obviously uses this handler\r
ot("Op%.4x%s\n", op, ms?"":":");\r
+\r
+ if (supervisor_check)\r
+ {\r
+ // checks for supervisor bit, if not set, jumps to SuperEnd()\r
+ // also sets r11 to SR high value, SuperChange() uses this\r
+ ot(" ldr r11,[r7,#0x44] ;@ Get SR high\n");\r
+ }\r
+ if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c))\r
+ {\r
+#if MEMHANDLERS_NEED_PREV_PC\r
+ ot(" str r4,[r7,#0x50] ;@ Save prev PC + 2\n");\r
+#endif\r
+#if MEMHANDLERS_NEED_CYCLES\r
+ ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
+#endif\r
+ }\r
+ if (supervisor_check)\r
+ {\r
+ ot(" tst r11,#0x20 ;@ Check we are in supervisor mode\n");\r
+ ot(" beq WrongPrivilegeMode ;@ No\n");\r
+ }\r
+ if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c)) {\r
+#if MEMHANDLERS_CHANGE_CYCLES\r
+ if (op_changes_cycles)\r
+ ot(" mov r5,#0\n");\r
+#endif\r
+ }\r
+ if (last_op_count!=arm_op_count)\r
+ ot("\n");\r
+ pc_dirty = 1;\r
+ opend_op_changes_cycles = opend_check_interrupt = opend_check_trace = 0;\r
}\r
\r
-void OpEnd()\r
+void OpEnd(int sea, int tea)\r
{\r
- ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
+ int did_fetch=0;\r
+ opend_check_trace = opend_check_trace && EMULATE_TRACE;\r
+#if MEMHANDLERS_CHANGE_CYCLES\r
+ if ((sea >= 0x10 && sea != 0x3c) || (tea >= 0x10 && tea != 0x3c))\r
+ {\r
+ if (opend_op_changes_cycles)\r
+ {\r
+ ot(" ldr r0,[r7,#0x5c] ;@ Load Cycles\n");\r
+ ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
+ ot(" add r5,r0,r5\n");\r
+ did_fetch=1;\r
+ }\r
+ else\r
+ {\r
+ ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
+ }\r
+ }\r
+#endif\r
+ if (!did_fetch)\r
+ ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
+ if (opend_check_trace)\r
+ ot(" ldr r1,[r7,#0x44]\n");\r
ot(" subs r5,r5,#%d ;@ Subtract cycles\n",Cycles);\r
- ot(" ldrge pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");\r
- ot(" b CycloneEnd\n");\r
- ltorg();\r
+ if (opend_check_trace)\r
+ {\r
+ ot(";@ CheckTrace:\n");\r
+ ot(" tst r1,#0x80\n");\r
+ ot(" bne CycloneDoTraceWithChecks\n");\r
+ ot(" cmp r5,#0\n");\r
+ }\r
+ if (opend_check_interrupt)\r
+ {\r
+ ot(" blt CycloneEnd\n");\r
+ ot(";@ CheckInterrupt:\n");\r
+ if (!opend_check_trace)\r
+ ot(" ldr r1,[r7,#0x44]\n");\r
+ ot(" movs r0,r1,lsr #24 ;@ Get IRQ level\n"); // same as ldrb r0,[r7,#0x47]\r
+ ot(" ldreq pc,[r6,r8,asl #2] ;@ Jump to next opcode handler\n");\r
+ ot(" cmp r0,#6 ;@ irq>6 ?\n");\r
+ ot(" andle r1,r1,#7 ;@ Get interrupt mask\n");\r
+ ot(" cmple r0,r1 ;@ irq<=6: Is irq<=mask ?\n");\r
+ ot(" ldrle pc,[r6,r8,asl #2] ;@ Jump to next opcode handler\n");\r
+ ot(" b CycloneDoInterruptGoBack\n");\r
+ }\r
+ else\r
+ {\r
+ ot(" ldrge pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");\r
+ ot(" b CycloneEnd\n");\r
+ }\r
ot("\n");\r
}\r
\r
-int OpBase(int op)\r
+int OpBase(int op,int size,int sepa)\r
{\r
int ea=op&0x3f; // Get Effective Address\r
- if (ea<0x10) return op&~0xf; // Use 1 handler for d0-d7 and a0-a7\r
- if (ea>=0x18 && ea<0x28 && (ea&7)==7) return op; // Specific handler for (a7)+ and -(a7)\r
+ if (ea<0x10) return sepa?(op&~0x7):(op&~0xf); // Use 1 handler for d0-d7 and a0-a7\r
+ if (size==0&&(ea==0x1f || ea==0x27)) return op; // Specific handler for (a7)+ and -(a7)\r
if (ea<0x38) return op&~7; // Use 1 handler for (a0)-(a7), etc...\r
return op;\r
}\r
\r
// Get flags, trashes r2\r
-int OpGetFlags(int subtract,int xbit)\r
+int OpGetFlags(int subtract,int xbit,int specialz)\r
{\r
- ot(" mrs r9,cpsr ;@ r9=flags\n");\r
+ if (specialz) ot(" orr r2,r10,#0xb0000000 ;@ for old Z\n");\r
+\r
+ ot(" mrs r10,cpsr ;@ r10=flags\n");\r
\r
- if (subtract) ot(" eor r9,r9,#0x20000000 ;@ Invert carry\n");\r
+ if (specialz) ot(" andeq r10,r10,r2 ;@ fix Z\n");\r
\r
- if (Accu&1) if (xbit)\r
+ if (subtract) ot(" eor r10,r10,#0x20000000 ;@ Invert carry\n");\r
+\r
+ if (xbit)\r
{\r
- ot(" mov r2,r9,lsr #28\n");\r
- ot(" strb r2,[r7,#0x45] ;@ Save X bit\n");\r
+ ot(" str r10,[r7,#0x4c] ;@ Save X bit\n");\r
}\r
return 0;\r
}\r
\r
// -----------------------------------------------------------------\r
\r
+int g_op;\r
+\r
void OpAny(int op)\r
{\r
memset(OpData,0x33,sizeof(OpData));\r
OpData[0]=(unsigned char)(op>>8);\r
OpData[1]=(unsigned char)op;\r
-\r
- if ((op&0xf100)==0x0000) OpArith(op);\r
- if ((op&0xc000)==0x0000) OpMove(op);\r
- if ((op&0xf5bf)==0x003c) OpArithSr(op); // Ori/Andi/Eori $nnnn,sr\r
- if ((op&0xf100)==0x0100) OpBtstReg(op);\r
- if ((op&0xff00)==0x0800) OpBtstImm(op);\r
- if ((op&0xf900)==0x4000) OpNeg(op);\r
- if ((op&0xf1c0)==0x41c0) OpLea(op);\r
- if ((op&0xf9c0)==0x40c0) OpMoveSr(op);\r
- if ((op&0xfff8)==0x4840) OpSwap(op);\r
- if ((op&0xffc0)==0x4840) OpPea(op);\r
- if ((op&0xffb8)==0x4880) OpExt(op);\r
- if ((op&0xfb80)==0x4880) OpMovem(op);\r
- if ((op&0xff00)==0x4a00) OpTst(op);\r
- if ((op&0xfff0)==0x4e40) OpTrap(op);\r
- if ((op&0xfff8)==0x4e50) OpLink(op);\r
- if ((op&0xfff8)==0x4e58) OpUnlk(op);\r
- if ((op&0xfff0)==0x4e60) OpMoveUsp(op);\r
- if ((op&0xfff8)==0x4e70) Op4E70(op); // Reset/Rts etc\r
- if ((op&0xff80)==0x4e80) OpJsr(op);\r
- if ((op&0xf000)==0x5000) OpAddq(op);\r
- if ((op&0xf0c0)==0x50c0) OpSet(op);\r
- if ((op&0xf0f8)==0x50c8) OpDbra(op);\r
- if ((op&0xf000)==0x6000) OpBranch(op);\r
- if ((op&0xf100)==0x7000) OpMoveq(op);\r
- if ((op&0xa000)==0x8000) OpArithReg(op); // Or/Sub/And/Add\r
- if ((op&0xb1f0)==0x8100) OpAbcd(op);\r
- if ((op&0xb0c0)==0x80c0) OpMul(op);\r
- if ((op&0x90c0)==0x90c0) OpAritha(op);\r
- if ((op&0xb138)==0x9100) OpAddx(op);\r
- if ((op&0xf000)==0xb000) OpCmpEor(op);\r
- if ((op&0xf130)==0xc100) OpExg(op);\r
- if ((op&0xf000)==0xe000) OpAsr(op); // Asr/l/Ror/l etc\r
- if ((op&0xf8c0)==0xe0c0) OpAsrEa(op);\r
-\r
+ g_op=op;\r
+\r
+ if ((op&0xf100)==0x0000) OpArith(op); // +\r
+ if ((op&0xc000)==0x0000) OpMove(op); // +\r
+ if ((op&0xf5bf)==0x003c) OpArithSr(op); // + Ori/Andi/Eori $nnnn,sr\r
+ if ((op&0xf100)==0x0100) OpBtstReg(op); // +\r
+ if ((op&0xf138)==0x0108) OpMovep(op); // +\r
+ if ((op&0xff00)==0x0800) OpBtstImm(op); // +\r
+ if ((op&0xf900)==0x4000) OpNeg(op); // +\r
+ if ((op&0xf140)==0x4100) OpChk(op); // +\r
+ if ((op&0xf1c0)==0x41c0) OpLea(op); // +\r
+ if ((op&0xf9c0)==0x40c0) OpMoveSr(op); // +\r
+ if ((op&0xffc0)==0x4800) OpNbcd(op); // +\r
+ if ((op&0xfff8)==0x4840) OpSwap(op); // +\r
+ if ((op&0xffc0)==0x4840) OpPea(op); // +\r
+ if ((op&0xffb8)==0x4880) OpExt(op); // +\r
+ if ((op&0xfb80)==0x4880) OpMovem(op); // +\r
+ if ((op&0xff00)==0x4a00) OpTst(op); // +\r
+ if ((op&0xffc0)==0x4ac0) OpTas(op); // +\r
+ if ((op&0xfff0)==0x4e40) OpTrap(op); // +\r
+ if ((op&0xfff8)==0x4e50) OpLink(op); // +\r
+ if ((op&0xfff8)==0x4e58) OpUnlk(op); // +\r
+ if ((op&0xfff0)==0x4e60) OpMoveUsp(op); // +\r
+ if ((op&0xfff8)==0x4e70) Op4E70(op); // + Reset/Rts etc\r
+ if ((op&0xfffd)==0x4e70) OpStopReset(op);// +\r
+ if ((op&0xff80)==0x4e80) OpJsr(op); // +\r
+ if ((op&0xf000)==0x5000) OpAddq(op); // +\r
+ if ((op&0xf0c0)==0x50c0) OpSet(op); // +\r
+ if ((op&0xf0f8)==0x50c8) OpDbra(op); // +\r
+ if ((op&0xf000)==0x6000) OpBranch(op); // +\r
+ if ((op&0xf100)==0x7000) OpMoveq(op); // +\r
+ if ((op&0xa000)==0x8000) OpArithReg(op); // + Or/Sub/And/Add\r
+ if ((op&0xb1f0)==0x8100) OpAbcd(op); // +\r
+ if ((op&0xb0c0)==0x80c0) OpMul(op); // +\r
+ if ((op&0x90c0)==0x90c0) OpAritha(op); // +\r
+ if ((op&0xb130)==0x9100) OpAddx(op); // +\r
+ if ((op&0xf000)==0xb000) OpCmpEor(op); // +\r
+ if ((op&0xf138)==0xb108) OpCmpm(op); // +\r
+ if ((op&0xf130)==0xc100) OpExg(op); // +\r
+ if ((op&0xf000)==0xe000) OpAsr(op); // + Asr/l/Ror/l etc\r
+ if ((op&0xf8c0)==0xe0c0) OpAsrEa(op); // +\r
+\r
+ if (op==0xffff)\r
+ {\r
+ SuperEnd();\r
+ }\r
}\r
+\r
notaz.gp2x.de / cyclone68000.git / blobdiff