merge mappers from FCEU-mm
[fceu.git] / boards / 23.c
1 /* FCE Ultra - NES/Famicom Emulator\r
2  *\r
3  * Copyright notice for this file:\r
4  *  Copyright (C) 2007 CaH4e3\r
5  *\r
6  * This program is free software; you can redistribute it and/or modify\r
7  * it under the terms of the GNU General Public License as published by\r
8  * the Free Software Foundation; either version 2 of the License, or\r
9  * (at your option) any later version.\r
10  *\r
11  * This program is distributed in the hope that it will be useful,\r
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of\r
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
14  * GNU General Public License for more details.\r
15  *\r
16  * You should have received a copy of the GNU General Public License\r
17  * along with this program; if not, write to the Free Software\r
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
19  *\r
20  * VRC-2/VRC-4 Konami\r
21  * VRC-4 Pirate\r
22  */\r
23 \r
24 #include "mapinc.h"\r
25 \r
26 static uint8 is23;\r
27 static uint16 IRQCount;\r
28 static uint8 IRQLatch,IRQa;\r
29 static uint8 prgreg[2];\r
30 static uint8 chrreg[8];\r
31 static uint8 regcmd, irqcmd, mirr, big_bank;\r
32 static uint16 acount=0;\r
33 \r
34 static uint8 *WRAM=NULL;\r
35 static uint32 WRAMSIZE;\r
36 \r
37 static SFORMAT StateRegs[]=\r
38 {\r
39   {prgreg, 2, "PREG"},\r
40   {chrreg, 8, "CREG"},\r
41   {&regcmd, 1, "CMDR"},\r
42   {&irqcmd, 1, "CMDI"},\r
43   {&mirr, 1, "MIRR"},\r
44   {&big_bank, 1, "BIGB"},\r
45   {&IRQCount, 2, "IRQC"},\r
46   {&IRQLatch, 1, "IRQL"},\r
47   {&IRQa, 1, "IRQA"},\r
48   {0}\r
49 };\r
50 \r
51 static void Sync(void)\r
52 {\r
53   if(regcmd&2)\r
54   {\r
55     setprg8(0xC000,prgreg[0]|big_bank);\r
56     setprg8(0x8000,((~1)&0x1F)|big_bank);\r
57   }\r
58   else\r
59   {\r
60     setprg8(0x8000,prgreg[0]|big_bank);\r
61     setprg8(0xC000,((~1)&0x1F)|big_bank);\r
62   }\r
63   setprg8(0xA000,prgreg[1]|big_bank);\r
64   setprg8(0xE000,((~0)&0x1F)|big_bank);\r
65   if(UNIFchrrama)\r
66     setchr8(0);\r
67   else\r
68   {\r
69     uint8 i;\r
70     for(i=0; i<8; i++)\r
71        setchr1(i<<10, chrreg[i]);\r
72   }\r
73   switch(mirr&0x3)\r
74   {\r
75     case 0: setmirror(MI_V); break;\r
76     case 1: setmirror(MI_H); break;\r
77     case 2: setmirror(MI_0); break;\r
78     case 3: setmirror(MI_1); break;\r
79   }\r
80 }\r
81 \r
82 static DECLFW(M23Write)\r
83 {\r
84 //  FCEU_printf("%04x:%04x\n",A,V);\r
85   A|=((A>>2)&0x3)|((A>>4)&0x3)|((A>>6)&0x3); // actually there is many-in-one mapper source, some pirate or\r
86                                              // licensed games use various address bits for registers\r
87   A&=0xF003;\r
88   if((A>=0xB000)&&(A<=0xE003))\r
89   {\r
90     if(UNIFchrrama)\r
91       big_bank=(V&8)<<2;                    // my personally many-in-one feature ;) just for support pirate cart 2-in-1\r
92     else\r
93     {\r
94       uint16 i=((A>>1)&1)|((A-0xB000)>>11);\r
95       chrreg[i]&=(0xF0)>>((A&1)<<2);\r
96       chrreg[i]|=(V&0xF)<<((A&1)<<2);\r
97     }\r
98     Sync();\r
99   }\r
100   else\r
101     switch(A&0xF003)\r
102     {\r
103       case 0x8000:\r
104       case 0x8001:\r
105       case 0x8002:\r
106       case 0x8003: if(is23)\r
107                      prgreg[0]=V&0x1F;\r
108                    Sync();\r
109                    break;\r
110       case 0xA000:\r
111       case 0xA001:\r
112       case 0xA002:\r
113       case 0xA003: if(is23)\r
114                      prgreg[1]=V&0x1F;\r
115                    else\r
116                    {\r
117                      prgreg[0]=(V<<1)&0x1F;\r
118                      prgreg[1]=((V<<1)&0x1F)|1;\r
119                    }\r
120                    Sync();\r
121                    break;\r
122       case 0x9000:\r
123       case 0x9001: if(V!=0xFF) mirr=V; Sync(); break;\r
124       case 0x9002:\r
125       case 0x9003: regcmd=V; Sync(); break;\r
126       case 0xF000: X6502_IRQEnd(FCEU_IQEXT); IRQLatch&=0xF0; IRQLatch|=V&0xF; break;\r
127       case 0xF001: X6502_IRQEnd(FCEU_IQEXT); IRQLatch&=0x0F; IRQLatch|=V<<4; break;\r
128       case 0xF002: X6502_IRQEnd(FCEU_IQEXT); acount=0; IRQCount=IRQLatch; IRQa=V&2; irqcmd=V&1; break;\r
129       case 0xF003: X6502_IRQEnd(FCEU_IQEXT); IRQa=irqcmd; break;\r
130     }\r
131 }\r
132 \r
133 static void M23Power(void)\r
134 {\r
135   big_bank=0x20;\r
136   Sync();\r
137   setprg8r(0x10,0x6000,0);              // another many-in-one code, WRAM actually contain only WaiWaiWorld game\r
138   SetReadHandler(0x6000,0x7FFF,CartBR);\r
139   SetWriteHandler(0x6000,0x7FFF,CartBW);\r
140   SetReadHandler(0x8000,0xFFFF,CartBR);\r
141   SetWriteHandler(0x8000,0xFFFF,M23Write);\r
142 }\r
143 \r
144 void FP_FASTAPASS(1) M23IRQHook(int a)\r
145 {\r
146   #define LCYCS 341\r
147   if(IRQa)\r
148   {\r
149     acount+=a*3;\r
150     if(acount>=LCYCS)\r
151     {\r
152       while(acount>=LCYCS)\r
153       {\r
154         acount-=LCYCS;\r
155         IRQCount++;\r
156         if(IRQCount&0x100)\r
157         {\r
158           X6502_IRQBegin(FCEU_IQEXT);\r
159           IRQCount=IRQLatch;\r
160         }\r
161       }\r
162     }\r
163   }\r
164 }\r
165 \r
166 static void StateRestore(int version)\r
167 {\r
168   Sync();\r
169 }\r
170 \r
171 static void M23Close(void)\r
172 {\r
173   if(WRAM)\r
174     FCEU_gfree(WRAM);\r
175 }\r
176 \r
177 void Mapper23_Init(CartInfo *info)\r
178 {\r
179   is23=1;\r
180   info->Power=M23Power;\r
181   info->Close=M23Close;\r
182   MapIRQHook=M23IRQHook;\r
183   GameStateRestore=StateRestore;\r
184 \r
185   WRAMSIZE=8192;\r
186   WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE);\r
187   SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1);\r
188   AddExState(WRAM, WRAMSIZE, 0, "WRAM");\r
189 \r
190   AddExState(&StateRegs, ~0, 0, 0);\r
191 }\r
192 \r
193 void UNLT230_Init(CartInfo *info)\r
194 {\r
195   is23=0;\r
196   info->Power=M23Power;\r
197   info->Close=M23Close;\r
198   MapIRQHook=M23IRQHook;\r
199   GameStateRestore=StateRestore;\r
200 \r
201   WRAMSIZE=8192;\r
202   WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE);\r
203   SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1);\r
204   AddExState(WRAM, WRAMSIZE, 0, "WRAM");\r
205 \r
206   AddExState(&StateRegs, ~0, 0, 0);\r
207 }\r