boards/konami-qtai.c

   1 /* FCE Ultra - NES/Famicom Emulator\r
   2  *\r
   3  * Copyright notice for this file:\r
   4  *  Copyright (C) 2005 CaH4e3\r
   5  *\r
   6  * This program is free software; you can redistribute it and/or modify\r
   7  * it under the terms of the GNU General Public License as published by\r
   8  * the Free Software Foundation; either version 2 of the License, or\r
   9  * (at your option) any later version.\r
  10  *\r
  11  * This program is distributed in the hope that it will be useful,\r
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of\r
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
  14  * GNU General Public License for more details.\r
  15  *\r
  16  * You should have received a copy of the GNU General Public License\r
  17  * along with this program; if not, write to the Free Software\r
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA\r
  19  *\r
  20  * VRC-5 (CAI Shogakko no Sansu)\r
  21  *\r
  22  */\r
  23 \r
  24 #include "mapinc.h"\r
  25 \r
  26 static uint8 QTAINTRAM[2048];\r
  27 static writefunc old2007wrap;\r
  28 \r
  29 static uint16 CHRSIZE = 8192;\r
  30 static uint16 WRAMSIZE = 8192 + 4096;\r
  31 static uint8 *CHRRAM = NULL;\r
  32 static uint8 *WRAM = NULL;\r
  33 \r
  34 static uint8 IRQa, K4IRQ;\r
  35 static uint32 IRQLatch, IRQCount;\r
  36 \r
  37 static uint8 regs[16];\r
  38 //static uint8 test[8];\r
  39 static SFORMAT StateRegs[]=\r
  40 {\r
  41   {&IRQCount, 1, "IRQC"},\r
  42   {&IRQLatch, 1, "IRQL"},\r
  43   {&IRQa, 1, "IRQA"},\r
  44   {&K4IRQ, 1, "KIRQ"},\r
  45   {regs, 16, "REGS"},\r
  46   {0}\r
  47 };\r
  48 \r
  49 static void chrSync(void)\r
  50 {\r
  51     setchr4r(0x10,0x0000,regs[5]&1);\r
  52     setchr4r(0x10,0x1000,0);\r
  53 }\r
  54 \r
  55 static void Sync(void)\r
  56 {\r
  57     chrSync();\r
  58 //  if(regs[0xA]&0x10)\r
  59 //  {\r
  60 /*    setchr1r(0x10,0x0000,(((regs[5]&1))<<2)+0);\r
  61     setchr1r(0x10,0x0400,(((regs[5]&1))<<2)+1);\r
  62     setchr1r(0x10,0x0800,(((regs[5]&1))<<2)+2);\r
  63     setchr1r(0x10,0x0c00,(((regs[5]&1))<<2)+3);\r
  64     setchr1r(0x10,0x1000,0);\r
  65     setchr1r(0x10,0x1400,1);\r
  66     setchr1r(0x10,0x1800,2);\r
  67     setchr1r(0x10,0x1c00,3);*/\r
  68 /*    setchr1r(0x10,0x0000,(((regs[5]&1))<<2)+0);\r
  69     setchr1r(0x10,0x0400,(((regs[5]&1))<<2)+1);\r
  70     setchr1r(0x10,0x0800,(((regs[5]&1))<<2)+2);\r
  71     setchr1r(0x10,0x0c00,(((regs[5]&1))<<2)+3);\r
  72     setchr1r(0x10,0x1000,(((regs[5]&1)^1)<<2)+4);\r
  73     setchr1r(0x10,0x1400,(((regs[5]&1)^1)<<2)+5);\r
  74     setchr1r(0x10,0x1800,(((regs[5]&1)^1)<<2)+6);\r
  75     setchr1r(0x10,0x1c00,(((regs[5]&1)^1)<<2)+7);\r
  76 */\r
  77 //  }\r
  78 //  else\r
  79 //  {\r
  80 /*\r
  81     setchr1r(0x10,0x0000,(((regs[5]&1)^1)<<2)+0);\r
  82     setchr1r(0x10,0x0400,(((regs[5]&1)^1)<<2)+1);\r
  83     setchr1r(0x10,0x0800,(((regs[5]&1)^1)<<2)+2);\r
  84     setchr1r(0x10,0x0c00,(((regs[5]&1)^1)<<2)+3);\r
  85     setchr1r(0x10,0x1000,(((regs[5]&1))<<2)+4);\r
  86     setchr1r(0x10,0x1400,(((regs[5]&1))<<2)+5);\r
  87     setchr1r(0x10,0x1800,(((regs[5]&1))<<2)+6);\r
  88     setchr1r(0x10,0x1c00,(((regs[5]&1))<<2)+7);\r
  89 //  }\r
  90 //*/\r
  91 /*    setchr1r(1,0x0000,test[0]);\r
  92     setchr1r(1,0x0400,test[1]);\r
  93     setchr1r(1,0x0800,test[2]);\r
  94     setchr1r(1,0x0c00,test[3]);\r
  95     setchr1r(1,0x1000,test[4]);\r
  96     setchr1r(1,0x1400,test[5]);\r
  97     setchr1r(1,0x1800,test[6]);\r
  98     setchr1r(1,0x1c00,test[7]);\r
  99 */\r
 100   setprg4r(0x10,0x6000,regs[0]&1);\r
 101   if(regs[2]>=0x40)\r
 102     setprg8r(1,0x8000,(regs[2]-0x40));\r
 103   else\r
 104     setprg8r(0,0x8000,(regs[2]&0x3F));\r
 105   if(regs[3]>=0x40)\r
 106     setprg8r(1,0xA000,(regs[3]-0x40));\r
 107   else\r
 108     setprg8r(0,0xA000,(regs[3]&0x3F));\r
 109   if(regs[4]>=0x40)\r
 110     setprg8r(1,0xC000,(regs[4]-0x40));\r
 111   else\r
 112     setprg8r(0,0xC000,(regs[4]&0x3F));\r
 113 \r
 114   setprg8r(1,0xE000,~0);\r
 115   setmirror(MI_V);\r
 116 }\r
 117 \r
 118 /*static DECLFW(TestWrite)\r
 119 {\r
 120   test[A&7] = V;\r
 121   Sync();\r
 122 }*/\r
 123 \r
 124 static DECLFW(M190Write)\r
 125 {\r
 126 // FCEU_printf("write %04x:%04x %d, %d\n",A,V,scanline,timestamp);\r
 127   regs[(A&0x0F00)>>8]=V;\r
 128   switch(A)\r
 129   {  \r
 130     case 0xd600:IRQLatch&=0xFF00;IRQLatch|=V;break;\r
 131     case 0xd700:IRQLatch&=0x00FF;IRQLatch|=V<<8;break;\r
 132     case 0xd900:IRQCount=IRQLatch;IRQa=V&2;K4IRQ=V&1;X6502_IRQEnd(FCEU_IQEXT);break;\r
 133     case 0xd800:IRQa=K4IRQ;X6502_IRQEnd(FCEU_IQEXT);break;\r
 134   }\r
 135   Sync();\r
 136 }\r
 137 \r
 138 static DECLFR(M190Read)\r
 139 {\r
 140 //  FCEU_printf("read  %04x:%04x %d, %d\n",A,regs[(A&0x0F00)>>8],scanline,timestamp);\r
 141   return regs[(A&0x0F00)>>8]+regs[0x0B];\r
 142 }\r
 143 static void FP_FASTAPASS(1) VRC5IRQ(int a)\r
 144 {\r
 145   if(IRQa)\r
 146   {\r
 147     IRQCount+=a;\r
 148     if(IRQCount&0x10000)\r
 149     {\r
 150       X6502_IRQBegin(FCEU_IQEXT);\r
 151       IRQCount=IRQLatch;\r
 152     }\r
 153   }\r
 154 }\r
 155 \r
 156 //static void FP_FASTAPASS(1) Mapper190_PPU(uint32 A)\r
 157 //{\r
 158 //  if(A<0x2000)\r
 159 //     setchr4r(0x10,0x1000,QTAINTRAM[A&0x1FFF]&1);\r
 160 //  else\r
 161 //     chrSync();\r
 162 //}\r
 163 \r
 164 static DECLFW(M1902007Wrap)\r
 165 {\r
 166   if(A>=0x2000)\r
 167   {\r
 168     if(regs[0xA]&1)\r
 169       QTAINTRAM[A&0x1FFF]=V;\r
 170     else\r
 171       old2007wrap(A,V);\r
 172   }\r
 173 }\r
 174 \r
 175 \r
 176 static void M190Power(void)\r
 177 {\r
 178 /*  test[0]=0;\r
 179   test[1]=1;\r
 180   test[2]=2;\r
 181   test[3]=3;\r
 182   test[4]=4;\r
 183   test[5]=5;\r
 184   test[6]=6;\r
 185   test[7]=7;\r
 186 */  \r
 187   setprg4r(0x10,0x7000,2);\r
 188 \r
 189   old2007wrap=GetWriteHandler(0x2007);\r
 190   SetWriteHandler(0x2007,0x2007,M1902007Wrap);\r
 191 \r
 192   SetReadHandler(0x6000,0xFFFF,CartBR);\r
 193 //  SetWriteHandler(0x5000,0x5007,TestWrite);\r
 194   SetWriteHandler(0x6000,0x7FFF,CartBW);\r
 195   SetWriteHandler(0x8000,0xFFFF,M190Write);\r
 196   SetReadHandler(0xDC00,0xDC00,M190Read);\r
 197   SetReadHandler(0xDD00,0xDD00,M190Read);\r
 198   Sync();\r
 199 }\r
 200 \r
 201 static void M190Close(void)\r
 202 {\r
 203   if(CHRRAM)\r
 204     FCEU_gfree(CHRRAM);\r
 205   CHRRAM=NULL;\r
 206   if(WRAM)\r
 207     FCEU_gfree(WRAM);\r
 208   WRAM=NULL;\r
 209 }\r
 210 \r
 211 static void StateRestore(int version)\r
 212 {\r
 213   Sync();\r
 214 }\r
 215 \r
 216 void Mapper190_Init(CartInfo *info)\r
 217 {\r
 218   info->Power=M190Power;\r
 219   info->Close=M190Close;\r
 220   GameStateRestore=StateRestore;\r
 221 \r
 222   MapIRQHook=VRC5IRQ;\r
 223 //  PPU_hook=Mapper190_PPU;\r
 224 \r
 225   CHRRAM=(uint8*)FCEU_gmalloc(CHRSIZE);\r
 226   SetupCartCHRMapping(0x10,CHRRAM,CHRSIZE,1);\r
 227   AddExState(CHRRAM, CHRSIZE, 0, "CRAM");\r
 228 \r
 229   WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE);\r
 230   SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1);\r
 231   AddExState(WRAM, WRAMSIZE, 0, "WRAM");\r
 232 \r
 233   if(info->battery)\r
 234   {\r
 235     info->SaveGame[0] = WRAM;\r
 236     info->SaveGameLen[0] = WRAMSIZE - 4096;\r
 237   }\r
 238 \r
 239   AddExState(&StateRegs, ~0, 0, 0);\r
 240 }\r