mapper fixes for ncpu, debug is broken atm
[fceu.git] / mappers / simple.c
1 /* FCE Ultra - NES/Famicom Emulator
2  *
3  * Copyright notice for this file:
4  *  Copyright (C) 1998 BERO
5  *  Copyright (C) 2002 Ben Parnell
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
20  */
21 #include <string.h>
22 #include "mapinc.h"
23
24 static uint8 latche;
25
26 static DECLFW(Mapper2_write)
27 {
28         latche=V;
29         ROM_BANK16(0x8000,V);
30         X6502_Rebase();
31 }
32
33 void Mapper2_init(void)
34 {
35   SetWriteHandler(0x8000,0xFFFF,Mapper2_write);
36   AddExState(&latche, 1, 0, "LATC");
37 }
38
39 static DECLFW(Mapper3_write)
40 {
41         VROM_BANK8(V);
42         latche=V;
43 }
44
45 void Mapper3_init(void)
46 {
47         SetWriteHandler(0x8000,0xFFFF,Mapper3_write);
48         AddExState(&latche, 1, 0, "LATC");
49 }
50
51 DECLFW(Mapper7_write)
52 {
53       ROM_BANK32(V&0xF);
54       onemir((V>>4)&1);
55       latche=V;
56       X6502_Rebase();
57 }
58
59 void Mapper7_init(void)
60 {
61         onemir(0);
62         ROM_BANK32(0);
63         SetWriteHandler(0x8000,0xFFFF,Mapper7_write);
64         AddExState(&latche, 1, 0, "LATC");
65 }
66
67 DECLFW(Mapper11_write)
68 {
69         ROM_BANK32(V);
70         VROM_BANK8(V>>4);
71         latche=V;
72         X6502_Rebase();
73 }
74
75 void Mapper11_init(void)
76 {
77         ROM_BANK32(0);
78         SetWriteHandler(0x8000,0xFFFF,Mapper11_write);
79         AddExState(&latche, 1, 0, "LATC");
80 }
81
82 static DECLFW(Mapper13_write)
83 {
84         setchr4r(0x10,0x1000,V&3);
85         setprg32(0x8000,(V>>4)&3);
86         latche=V;
87         X6502_Rebase();
88 }
89
90 static void Mapper13_StateRestore(int version)
91 {
92         setchr4r(0x10,0x0000,0);
93         setchr4r(0x10,0x1000,latche&3);
94         setprg32(0x8000,(latche>>4)&3);
95         X6502_Rebase();
96 }
97
98 void Mapper13_init(void)
99 {
100         SetWriteHandler(0x8000,0xFFFF,Mapper13_write);
101         GameStateRestore=Mapper13_StateRestore;
102         AddExState(&latche, 1, 0, "LATC");
103         AddExState(MapperExRAM, 16384, 0, "CHRR");
104         SetupCartCHRMapping(0x10, MapperExRAM, 16384, 1);
105
106         latche=0;
107         Mapper13_StateRestore(VERSION_NUMERIC);
108 }
109
110 DECLFW(Mapper34_write)
111 {
112 switch(A)
113  {
114  case 0x7FFD:ROM_BANK32(V);
115              X6502_Rebase();break;
116  case 0x7FFE:VROM_BANK4(0x0000,V);break;
117  case 0x7fff:VROM_BANK4(0x1000,V);break;
118  }
119  if(A>=0x8000)
120  {
121   ROM_BANK32(V);
122   X6502_Rebase();
123  }
124 }
125
126 void Mapper34_init(void)
127 {
128   SetWriteHandler(0x7ffd,0xffff,Mapper34_write);
129 }
130
131 DECLFW(Mapper66_write)
132 {
133  VROM_BANK8(V&0xF);
134  ROM_BANK32((V>>4));
135  latche=V;
136  X6502_Rebase();
137 }
138
139 void Mapper66_init(void)
140 {
141  ROM_BANK32(0);
142  SetWriteHandler(0x6000,0xffff,Mapper66_write);
143  AddExState(&latche, 1, 0, "LATC");
144 }
145
146 DECLFW(Mapper152_write)
147 {
148  ROM_BANK16(0x8000,(V>>4)&0x7);
149  VROM_BANK8(V&0xF);
150  onemir((V>>7)&1);      /* Saint Seiya...hmm. */
151  latche=V;
152  X6502_Rebase();
153 }
154
155 void Mapper152_init(void)
156 {
157  onemir(0);
158  SetWriteHandler(0x6000,0xffff,Mapper152_write);
159  AddExState(&latche, 1, 0, "LATC");
160 }
161
162 static DECLFW(Mapper70_write)
163 {
164  ROM_BANK16(0x8000,V>>4);
165  VROM_BANK8(V&0xF);
166  latche=V;
167  X6502_Rebase();
168 }
169
170 void Mapper70_init(void)
171 {
172  SetWriteHandler(0x6000,0xffff,Mapper70_write);
173  AddExState(&latche, 1, 0, "LATC");
174 }
175 /* Should be two separate emulation functions for this "mapper".  Sigh.  URGE TO KILL RISING. */
176 static DECLFW(Mapper78_write)
177 {
178  //printf("$%04x:$%02x\n",A,V);
179  ROM_BANK16(0x8000,V&0x7);
180  VROM_BANK8(V>>4);
181  onemir((V>>3)&1);
182  latche=V;
183  X6502_Rebase();
184 }
185
186 void Mapper78_init(void)
187 {
188  SetWriteHandler(0x8000,0xffff,Mapper78_write);
189  AddExState(&latche, 1, 0, "LATC");
190 }
191
192 DECLFW(Mapper87_write)
193 {
194  VROM_BANK8(V>>1);
195  latche=V;
196 }
197
198 void Mapper87_init(void)
199 {
200  SetWriteHandler(0x6000,0xffff,Mapper87_write);
201  AddExState(&latche, 1, 0, "LATC");
202 }
203
204 DECLFW(Mapper93_write)
205 {
206   ROM_BANK16(0x8000,V>>4);
207   MIRROR_SET(V&1);
208   latche=V;
209   X6502_Rebase();
210 }
211
212 void Mapper93_init(void)
213 {
214   SetWriteHandler(0x8000,0xffff,Mapper93_write);
215   AddExState(&latche, 1, 0, "LATC");
216 }
217
218
219 DECLFW(Mapper94_write)
220 {
221  ROM_BANK16(0x8000,V>>2);
222  latche=V;
223  X6502_Rebase();
224 }
225
226 void Mapper94_init(void)
227 {
228   SetWriteHandler(0x8000,0xffff,Mapper94_write);
229   AddExState(&latche, 1, 0, "LATC");
230 }
231
232 /* I might want to add some code to the mapper 96 PPU hook function
233    to not change CHR banks if the attribute table is being accessed,
234    if I make emulation a little more accurate in the future.
235 */
236
237 static uint8 M96LA;
238 static DECLFW(Mapper96_write)
239 {
240  latche=V;
241  setprg32(0x8000,V&3);
242  setchr4r(0x10,0x0000,(latche&4)|M96LA);
243  setchr4r(0x10,0x1000,(latche&4)|3);
244  X6502_Rebase();
245 }
246
247 static void FP_FASTAPASS(1) M96Hook(uint32 A)
248 {
249  if((A&0x3000)!=0x2000)
250   return;
251  M96LA=(A>>8)&3;
252  setchr4r(0x10,0x0000,(latche&4)|M96LA);
253 }
254
255 static void M96Sync()
256 {
257  setprg32(0x8000,latche&3);
258  setchr4r(0x10,0x0000,(latche&4)|M96LA);
259  setchr4r(0x10,0x1000,(latche&4)|3);
260  X6502_Rebase();
261 }
262
263 void Mapper96_init(void)
264 {
265  SetWriteHandler(0x8000,0xffff,Mapper96_write);
266  PPU_hook=M96Hook;
267  AddExState(&latche, 1, 0, "LATC");
268  AddExState(&M96LA, 1, 0, "LAVA");
269  SetupCartCHRMapping(0x10, MapperExRAM, 32768, 1);
270  latche=M96LA=0;
271  M96Sync();
272  GameStateRestore=M96Sync;
273 }
274
275 static DECLFW(Mapper140_write)
276 {
277  VROM_BANK8(V&0xF);
278  ROM_BANK32((V>>4)&0xF);
279  X6502_Rebase();
280 }
281
282 void Mapper140_init(void)
283 {
284  ROM_BANK32(0);
285  SetWriteHandler(0x6000,0x7FFF,Mapper140_write);
286 }
287
288 static void M185Sync()
289 {
290  int x;
291
292  if(!(mapbyte1[0]&3))
293 // if(!(mapbyte1[0]==0x21))
294  {
295   for(x=0;x<8;x++)
296    setchr1r(0x10,x<<10,0);
297   }
298  else
299   setchr8(0);
300 }
301
302 static DECLFW(Mapper185_write)
303 {
304  mapbyte1[0]=V;
305  M185Sync();
306  // printf("Wr: $%04x:$%02x\n",A,V);
307 }
308
309 void Mapper185_init(void)
310 {
311  memset(MapperExRAM,0xFF,1024);
312  MapStateRestore=M185Sync;
313  mapbyte1[0]=0;
314  M185Sync();
315
316  SetupCartCHRMapping(0x10,MapperExRAM,1024,0);
317  SetWriteHandler(0x8000,0xFFFF,Mapper185_write);
318 }