frontend: update libpicofe, fix missed callbacks
[pcsx_rearmed.git] / libpcsxcore / gpu.h
CommitLineData
c2502333 1/* Pcsx - Pc Psx Emulator
2 * Copyright (C) 1999-2016 Pcsx Team
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses>.
16 */
ddbaf678 17
18/*
19 * q: Why bother with GPU stuff in a plugin-based emu core?
20 * a: mostly because of busy bits, we have all the needed timing info
21 * that GPU plugin doesn't.
22 */
23
7a8d521f 24#ifndef __GPU_H__
25#define __GPU_H__
26
597571ad 27#include <stdint.h>
28
29typedef struct GPUFreeze {
30 uint32_t ulFreezeVersion;
31 uint32_t ulStatus;
32 uint32_t ulControl[256];
33 unsigned char psxVRam[1024*512*2];
34} GPUFreeze_t;
35
db57cbb8 36#define PSXGPU_LCF (1u<<31)
37#define PSXGPU_nBUSY (1u<<26)
38#define PSXGPU_ILACE (1u<<22)
4a15db3f 39#define PSXGPU_RGB24 (1u<<21)
db57cbb8 40#define PSXGPU_DHEIGHT (1u<<19)
41#define PSXGPU_FIELD (1u<<13)
0486fdc9 42
43// both must be set for interlace to work
c9f729d0 44#define PSXGPU_ILACE_BITS (PSXGPU_ILACE | PSXGPU_DHEIGHT)
ddbaf678 45
46#define HW_GPU_STATUS psxHu32ref(0x1814)
47
48// TODO: handle com too
db57cbb8 49#define PSXGPU_TIMING_BITS (PSXGPU_LCF | PSXGPU_nBUSY | PSXGPU_FIELD)
ddbaf678 50
51#define gpuSyncPluginSR() { \
086adfff
PC
52 HW_GPU_STATUS &= SWAP32(PSXGPU_TIMING_BITS); \
53 HW_GPU_STATUS |= SWAP32(GPU_readStatus() & ~PSXGPU_TIMING_BITS); \
ddbaf678 54}
7a8d521f 55
abf09485 56enum psx_gpu_state {
57 PGS_VRAM_TRANSFER_START,
58 PGS_VRAM_TRANSFER_END,
59 PGS_PRIMITIVE_START, // for non-dma only
60};
61
b244864a 62void gpu_state_change(int what, int cycles);
abf09485 63
7a8d521f 64#endif /* __GPU_H__ */