drc: adjust debugging code to work with hle bios
[pcsx_rearmed.git] / libpcsxcore / new_dynarec / patches / trace_drc_chk
CommitLineData
a151a8d8 1diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c
4f13a577 2index ede1f93c..1c8965f0 100644
a151a8d8 3--- a/libpcsxcore/new_dynarec/new_dynarec.c
4+++ b/libpcsxcore/new_dynarec/new_dynarec.c
4f13a577 5@@ -324,7 +324,7 @@ static struct compile_info
2330734f 6 int new_dynarec_hacks_old;
7 int new_dynarec_did_compile;
8
9- #define HACK_ENABLED(x) ((new_dynarec_hacks | new_dynarec_hacks_pergame) & (x))
10+ #define HACK_ENABLED(x) ((NDHACK_NO_STALLS) & (x))
11
4f13a577 12 extern int cycle_count; // ... until end of the timeslice, counts -N -> 0 (CCREG)
2330734f 13 extern int last_count; // last absolute target, often = next_interupt
4f13a577 14@@ -602,6 +602,7 @@ static int cycle_multiplier_active;
2330734f 15
16 static int CLOCK_ADJUST(int x)
17 {
18+ return x * 2;
55a695d9 19 int m = cycle_multiplier_active;
20 int s = (x >> 31) | 1;
21 return (x * m + s * 50) / 100;
4f13a577 22@@ -776,6 +777,9 @@ static noinline u_int generate_exception(u_int pc)
a151a8d8 23 // This is called from the recompiled JR/JALR instructions
55a695d9 24 static void noinline *get_addr(u_int vaddr, int can_compile)
a151a8d8 25 {
26+#ifdef DRC_DBG
27+printf("get_addr %08x, pc=%08x\n", vaddr, psxRegs.pc);
28+#endif
55a695d9 29 u_int start_page = get_page_prev(vaddr);
30 u_int i, page, end_page = get_page(vaddr);
31 void *found_clean = NULL;
4f13a577 32@@ -7157,7 +7161,7 @@ static noinline void pass2_unneeded_regs(int istart,int iend,int r)
a151a8d8 33 // R0 is always unneeded
d1e4ebd9 34 u|=1;
a151a8d8 35 // Save it
36- unneeded_reg[i]=u;
37+ unneeded_reg[i]=1;//u;
a151a8d8 38 gte_unneeded[i]=gte_u;
39 /*
d1e4ebd9 40 printf("ur (%d,%d) %x: ",istart,iend,start+i*4);
4f13a577 41@@ -8299,6 +8303,7 @@ static noinline void pass5a_preallocate1(void)
55a695d9 42 static noinline void pass5b_preallocate2(void)
43 {
44 int i, hr;
45+ return;
a151a8d8 46 for(i=0;i<slen-1;i++)
47 {
37387d8b 48 if (!i || !dops[i-1].is_jump)
4f13a577 49@@ -9321,6 +9326,10 @@ static int new_recompile_block(u_int addr)
55a695d9 50
37387d8b 51 #ifdef ASSEM_PRINT
52 fflush(stdout);
53+#endif
a151a8d8 54+#ifdef DRC_DBG
55+printf("new_recompile_block done\n");
56+fflush(stdout);
37387d8b 57 #endif
55a695d9 58 stat_inc(stat_bc_direct);
a151a8d8 59 return 0;
2330734f 60diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
4f13a577 61index 87aa17c5..5dcbe01d 100644
2330734f 62--- a/libpcsxcore/new_dynarec/pcsxmem.c
63+++ b/libpcsxcore/new_dynarec/pcsxmem.c
4f13a577 64@@ -252,6 +252,8 @@ static void write_biu(u32 value)
2330734f 65 return;
a5cd72d0 66 }
2330734f 67
68+extern u32 handler_cycle;
69+handler_cycle = psxRegs.cycle;
a5cd72d0 70 memprintf("write_biu %08x @%08x %u\n", value, psxRegs.pc, psxRegs.cycle);
71 psxRegs.biuReg = value;
72 }
2330734f 73diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c
a5cd72d0 74index 18bd6a4e..bc2eb3f6 100644
2330734f 75--- a/libpcsxcore/psxcounters.c
76+++ b/libpcsxcore/psxcounters.c
a5cd72d0 77@@ -389,9 +389,12 @@ void psxRcntUpdate()
2330734f 78
79 /******************************************************************************/
80
81+extern u32 handler_cycle;
82+
83 void psxRcntWcount( u32 index, u32 value )
84 {
85 verboseLog( 2, "[RCNT %i] wcount: %x\n", index, value );
86+handler_cycle = psxRegs.cycle;
87
88 _psxRcntWcount( index, value );
89 psxRcntSet();
a5cd72d0 90@@ -400,6 +403,7 @@ void psxRcntWcount( u32 index, u32 value )
2330734f 91 void psxRcntWmode( u32 index, u32 value )
92 {
93 verboseLog( 1, "[RCNT %i] wmode: %x\n", index, value );
94+handler_cycle = psxRegs.cycle;
95
96 _psxRcntWmode( index, value );
97 _psxRcntWcount( index, 0 );
a5cd72d0 98@@ -411,6 +415,7 @@ void psxRcntWmode( u32 index, u32 value )
2330734f 99 void psxRcntWtarget( u32 index, u32 value )
100 {
101 verboseLog( 1, "[RCNT %i] wtarget: %x\n", index, value );
102+handler_cycle = psxRegs.cycle;
103
104 rcnts[index].target = value;
105
a5cd72d0 106@@ -423,6 +428,7 @@ void psxRcntWtarget( u32 index, u32 value )
2330734f 107 u32 psxRcntRcount( u32 index )
108 {
109 u32 count;
110+handler_cycle = psxRegs.cycle;
111
112 count = _psxRcntRcount( index );
113
a5cd72d0 114diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
4f13a577 115index 5756bee5..4fe98b1b 100644
a5cd72d0 116--- a/libpcsxcore/psxinterpreter.c
117+++ b/libpcsxcore/psxinterpreter.c
4f13a577 118@@ -238,7 +238,7 @@ static inline void addCycle(psxRegisters *regs)
a5cd72d0 119 {
120 assert(regs->subCycleStep >= 0x10000);
121 regs->subCycle += regs->subCycleStep;
122- regs->cycle += regs->subCycle >> 16;
123+ regs->cycle += 2; //regs->subCycle >> 16;
124 regs->subCycle &= 0xffff;
125 }
126
4f13a577 127@@ -1344,8 +1344,14 @@ static void intShutdown() {
a5cd72d0 128 // single step (may do several ops in case of a branch or load delay)
4f13a577 129 // called by asm/dynarec
a5cd72d0 130 void execI(psxRegisters *regs) {
131+ extern int last_count;
132+ void do_insn_cmp(void);
133+ printf("execI %08x c %u, ni %u\n", regs->pc, regs->cycle, next_interupt);
134+ last_count = 0;
135 do {
136 execIbp(psxMemRLUT, regs);
137+ if (regs->dloadReg[0] || regs->dloadReg[1])
138+ do_insn_cmp();
139 } while (regs->dloadReg[0] || regs->dloadReg[1]);
140 }
141