[pcsx_rearmed.git] / libpcsxcore / psxdma.c

/***************************************************************************
 *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
 *                                                                         *
 *   This program is free software; you can redistribute it and/or modify  *
 *   it under the terms of the GNU General Public License as published by  *
 *   the Free Software Foundation; either version 2 of the License, or     *
 *   (at your option) any later version.                                   *
 *                                                                         *
 *   This program is distributed in the hope that it will be useful,       *
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
 *   GNU General Public License for more details.                          *
 *                                                                         *
 *   You should have received a copy of the GNU General Public License     *
 *   along with this program; if not, write to the                         *
 *   Free Software Foundation, Inc.,                                       *
 *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
 ***************************************************************************/

/*
* Handles PSX DMA functions.
*/

#include "psxdma.h"
#include "gpu.h"

// Dma0/1 in Mdec.c
// Dma3   in CdRom.c

void spuInterrupt() {
	if (HW_DMA4_CHCR & SWAP32(0x01000000))
	{
		HW_DMA4_CHCR &= SWAP32(~0x01000000);
		DMA_INTERRUPT(4);
	}
}

void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU
	u16 *ptr;
	u32 words;

	switch (chcr) {
		case 0x01000201: //cpu to spu transfer
#ifdef PSXDMA_LOG
			PSXDMA_LOG("*** DMA4 SPU - mem2spu *** %x addr = %x size = %x\n", chcr, madr, bcr);
#endif
			ptr = (u16 *)PSXM(madr);
			if (ptr == INVALID_PTR) {
#ifdef CPU_LOG
				CPU_LOG("*** DMA4 SPU - mem2spu *** NULL Pointer!!!\n");
#endif
				break;
			}
			words = (bcr >> 16) * (bcr & 0xffff);
			SPU_writeDMAMem(ptr, words * 2, psxRegs.cycle);
			HW_DMA4_MADR = SWAPu32(madr + words * 4);
			SPUDMA_INT(words * 4);
			return;

		case 0x01000200: //spu to cpu transfer
#ifdef PSXDMA_LOG
			PSXDMA_LOG("*** DMA4 SPU - spu2mem *** %x addr = %x size = %x\n", chcr, madr, bcr);
#endif
			ptr = (u16 *)PSXM(madr);
			if (ptr == INVALID_PTR) {
#ifdef CPU_LOG
				CPU_LOG("*** DMA4 SPU - spu2mem *** NULL Pointer!!!\n");
#endif
				break;
			}
			words = (bcr >> 16) * (bcr & 0xffff);
			SPU_readDMAMem(ptr, words * 2, psxRegs.cycle);
			psxCpu->Clear(madr, words);

			HW_DMA4_MADR = SWAPu32(madr + words * 4);
			SPUDMA_INT(words * 4);
			return;

		default:
			log_unhandled("*** DMA4 SPU - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
			break;
	}

	HW_DMA4_CHCR &= SWAP32(~0x01000000);
	DMA_INTERRUPT(4);
}

// Taken from PEOPS SOFTGPU
static inline boolean CheckForEndlessLoop(u32 laddr, u32 *lUsedAddr) {
	if (laddr == lUsedAddr[1]) return TRUE;
	if (laddr == lUsedAddr[2]) return TRUE;

	if (laddr < lUsedAddr[0]) lUsedAddr[1] = laddr;
	else lUsedAddr[2] = laddr;

	lUsedAddr[0] = laddr;

	return FALSE;
}

static u32 gpuDmaChainSize(u32 addr) {
	u32 size;
	u32 DMACommandCounter = 0;
	u32 lUsedAddr[3];

	lUsedAddr[0] = lUsedAddr[1] = lUsedAddr[2] = 0xffffff;

	// initial linked list ptr (word)
	size = 1;

	do {
		addr &= 0x1ffffc;

		if (DMACommandCounter++ > 2000000) break;
		if (CheckForEndlessLoop(addr, lUsedAddr)) break;

		// # 32-bit blocks to transfer
		size += psxMu8( addr + 3 );

		// next 32-bit pointer
		addr = psxMu32( addr & ~0x3 ) & 0xffffff;
		size += 1;
	} while (!(addr & 0x800000)); // contrary to some documentation, the end-of-linked-list marker is not actually 0xFF'FFFF
                                  // any pointer with bit 23 set will do.

	return size;
}

void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
	u32 *ptr, madr_next, *madr_next_p;
	int do_walking;
	u32 words;
	u32 size;

	switch (chcr) {
		case 0x01000200: // vram2mem
#ifdef PSXDMA_LOG
			PSXDMA_LOG("*** DMA2 GPU - vram2mem *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
#endif
			ptr = (u32 *)PSXM(madr);
			if (ptr == INVALID_PTR) {
#ifdef CPU_LOG
				CPU_LOG("*** DMA2 GPU - vram2mem *** NULL Pointer!!!\n");
#endif
				break;
			}
			// BA blocks * BS words (word = 32-bits)
			words = (bcr >> 16) * (bcr & 0xffff);
			GPU_readDataMem(ptr, words);
			psxCpu->Clear(madr, words);

			HW_DMA2_MADR = SWAPu32(madr + words * 4);

			// already 32-bit word size ((size * 4) / 4)
			GPUDMA_INT(words / 4);
			return;

		case 0x01000201: // mem2vram
#ifdef PSXDMA_LOG
			PSXDMA_LOG("*** DMA 2 - GPU mem2vram *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
#endif
			ptr = (u32 *)PSXM(madr);
			if (ptr == INVALID_PTR) {
#ifdef CPU_LOG
				CPU_LOG("*** DMA2 GPU - mem2vram *** NULL Pointer!!!\n");
#endif
				break;
			}
			// BA blocks * BS words (word = 32-bits)
			words = (bcr >> 16) * (bcr & 0xffff);
			GPU_writeDataMem(ptr, words);

			HW_DMA2_MADR = SWAPu32(madr + words * 4);

			// already 32-bit word size ((size * 4) / 4)
			GPUDMA_INT(words / 4);
			return;

		case 0x01000401: // dma chain
#ifdef PSXDMA_LOG
			PSXDMA_LOG("*** DMA 2 - GPU dma chain *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
#endif
			// when not emulating walking progress, end immediately
			madr_next = 0xffffff;

			do_walking = Config.GpuListWalking;
			if (do_walking < 0)
				do_walking = Config.hacks.gpu_slow_list_walking;
			madr_next_p = do_walking ? &madr_next : NULL;

			size = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff, madr_next_p);
			if ((int)size <= 0)
				size = gpuDmaChainSize(madr);

			HW_GPU_STATUS &= SWAP32(~PSXGPU_nBUSY);
			HW_DMA2_MADR = SWAPu32(madr_next);

			// Tekken 3 = use 1.0 only (not 1.5x)

			// Einhander = parse linked list in pieces (todo)
			// Rebel Assault 2 = parse linked list in pieces (todo)
			GPUDMA_INT(size);
			return;

		default:
			log_unhandled("*** DMA 2 - GPU unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
			break;
	}

	HW_DMA2_CHCR &= SWAP32(~0x01000000);
	DMA_INTERRUPT(2);
}

void gpuInterrupt() {
	if (HW_DMA2_CHCR == SWAP32(0x01000401) && !(HW_DMA2_MADR & SWAP32(0x800000)))
	{
		u32 size, madr_next = 0xffffff;
		size = GPU_dmaChain((u32 *)psxM, HW_DMA2_MADR & 0x1fffff, &madr_next);
		HW_DMA2_MADR = SWAPu32(madr_next);
		GPUDMA_INT(size);
		return;
	}
	if (HW_DMA2_CHCR & SWAP32(0x01000000))
	{
		HW_DMA2_CHCR &= SWAP32(~0x01000000);
		DMA_INTERRUPT(2);
	}
	HW_GPU_STATUS |= SWAP32(PSXGPU_nBUSY); // GPU no longer busy
}

void psxDma6(u32 madr, u32 bcr, u32 chcr) {
	u32 words;
	u32 *mem = (u32 *)PSXM(madr);

#ifdef PSXDMA_LOG
	PSXDMA_LOG("*** DMA6 OT *** %x addr = %x size = %x\n", chcr, madr, bcr);
#endif

	if (chcr == 0x11000002) {
		if (mem == INVALID_PTR) {
#ifdef CPU_LOG
			CPU_LOG("*** DMA6 OT *** NULL Pointer!!!\n");
#endif
			HW_DMA6_CHCR &= SWAP32(~0x01000000);
			DMA_INTERRUPT(6);
			return;
		}

		// already 32-bit size
		words = bcr;

		while (bcr--) {
			*mem-- = SWAP32((madr - 4) & 0xffffff);
			madr -= 4;
		}
		*++mem = SWAP32(0xffffff);

		//GPUOTCDMA_INT(size);
		// halted
		psxRegs.cycle += words;
		GPUOTCDMA_INT(16);
		return;
	}
	else {
		// Unknown option
		log_unhandled("*** DMA6 OT - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
	}

	HW_DMA6_CHCR &= SWAP32(~0x01000000);
	DMA_INTERRUPT(6);
}

void gpuotcInterrupt()
{
	if (HW_DMA6_CHCR & SWAP32(0x01000000))
	{
		HW_DMA6_CHCR &= SWAP32(~0x01000000);
		DMA_INTERRUPT(6);
	}
}
Commit	Line	Data
ef79bbde P	1	/***************************************************************************
	2	* Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team *
	3	* *
	4	* This program is free software; you can redistribute it and/or modify *
	5	* it under the terms of the GNU General Public License as published by *
	6	* the Free Software Foundation; either version 2 of the License, or *
	7	* (at your option) any later version. *
	8	* *
	9	* This program is distributed in the hope that it will be useful, *
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of *
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
	12	* GNU General Public License for more details. *
	13	* *
	14	* You should have received a copy of the GNU General Public License *
	15	* along with this program; if not, write to the *
	16	* Free Software Foundation, Inc., *
	17	* 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA. *
	18	***************************************************************************/
	19
	20	/*
	21	* Handles PSX DMA functions.
	22	*/
	23
	24	#include "psxdma.h"
6c036261	25	#include "gpu.h"
ef79bbde P	26
	27	// Dma0/1 in Mdec.c
	28	// Dma3 in CdRom.c
	29
	30	void spuInterrupt() {
ad418c19	31	if (HW_DMA4_CHCR & SWAP32(0x01000000))
	32	{
	33	HW_DMA4_CHCR &= SWAP32(~0x01000000);
	34	DMA_INTERRUPT(4);
	35	}
ef79bbde P	36	}
	37
	38	void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU
	39	u16 *ptr;
58ebb94c	40	u32 words;
ef79bbde P	41
	42	switch (chcr) {
	43	case 0x01000201: //cpu to spu transfer
	44	#ifdef PSXDMA_LOG
	45	PSXDMA_LOG("* DMA4 SPU - mem2spu * %x addr = %x size = %x\n", chcr, madr, bcr);
	46	#endif
	47	ptr = (u16 *)PSXM(madr);
7a8d521f	48	if (ptr == INVALID_PTR) {
ef79bbde P	49	#ifdef CPU_LOG
	50	CPU_LOG("* DMA4 SPU - mem2spu * NULL Pointer!!!\n");
	51	#endif
	52	break;
	53	}
58ebb94c	54	words = (bcr >> 16) * (bcr & 0xffff);
	55	SPU_writeDMAMem(ptr, words * 2, psxRegs.cycle);
	56	HW_DMA4_MADR = SWAPu32(madr + words * 4);
4f329f16	57	SPUDMA_INT(words * 4);
ef79bbde P	58	return;
	59
	60	case 0x01000200: //spu to cpu transfer
	61	#ifdef PSXDMA_LOG
	62	PSXDMA_LOG("* DMA4 SPU - spu2mem * %x addr = %x size = %x\n", chcr, madr, bcr);
	63	#endif
	64	ptr = (u16 *)PSXM(madr);
7a8d521f	65	if (ptr == INVALID_PTR) {
ef79bbde P	66	#ifdef CPU_LOG
	67	CPU_LOG("* DMA4 SPU - spu2mem * NULL Pointer!!!\n");
	68	#endif
	69	break;
	70	}
58ebb94c	71	words = (bcr >> 16) * (bcr & 0xffff);
	72	SPU_readDMAMem(ptr, words * 2, psxRegs.cycle);
	73	psxCpu->Clear(madr, words);
	74
	75	HW_DMA4_MADR = SWAPu32(madr + words * 4);
4f329f16	76	SPUDMA_INT(words * 4);
58ebb94c	77	return;
ef79bbde	78
ef79bbde	79	default:
6c9db47c	80	log_unhandled("* DMA4 SPU - unknown * %x addr = %x size = %x\n", chcr, madr, bcr);
ef79bbde	81	break;
ef79bbde P	82	}
	83
	84	HW_DMA4_CHCR &= SWAP32(~0x01000000);
	85	DMA_INTERRUPT(4);
	86	}
	87
57a757ce	88	// Taken from PEOPS SOFTGPU
	89	static inline boolean CheckForEndlessLoop(u32 laddr, u32 *lUsedAddr) {
	90	if (laddr == lUsedAddr[1]) return TRUE;
	91	if (laddr == lUsedAddr[2]) return TRUE;
	92
	93	if (laddr < lUsedAddr[0]) lUsedAddr[1] = laddr;
	94	else lUsedAddr[2] = laddr;
	95
	96	lUsedAddr[0] = laddr;
	97
	98	return FALSE;
	99	}
	100
	101	static u32 gpuDmaChainSize(u32 addr) {
	102	u32 size;
	103	u32 DMACommandCounter = 0;
	104	u32 lUsedAddr[3];
	105
	106	lUsedAddr[0] = lUsedAddr[1] = lUsedAddr[2] = 0xffffff;
	107
	108	// initial linked list ptr (word)
	109	size = 1;
	110
	111	do {
	112	addr &= 0x1ffffc;
	113
	114	if (DMACommandCounter++ > 2000000) break;
	115	if (CheckForEndlessLoop(addr, lUsedAddr)) break;
	116
	117	// # 32-bit blocks to transfer
	118	size += psxMu8( addr + 3 );
	119
	120	// next 32-bit pointer
	121	addr = psxMu32( addr & ~0x3 ) & 0xffffff;
	122	size += 1;
502ea36e	123	} while (!(addr & 0x800000)); // contrary to some documentation, the end-of-linked-list marker is not actually 0xFF'FFFF
502ea36e	124	// any pointer with bit 23 set will do.
57a757ce	125
	126	return size;
	127	}
	128
ef79bbde	129	void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
8c84ba5f	130	u32 ptr, madr_next, madr_next_p;
8c84ba5f	131	int do_walking;
58ebb94c	132	u32 words;
ef79bbde P	133	u32 size;
ef79bbde P	134
57a757ce	135	switch (chcr) {
ef79bbde P	136	case 0x01000200: // vram2mem
ef79bbde P	137	#ifdef PSXDMA_LOG
57a757ce	138	PSXDMA_LOG("* DMA2 GPU - vram2mem * %lx addr = %lx size = %lx\n", chcr, madr, bcr);
ef79bbde P	139	#endif
ef79bbde P	140	ptr = (u32 *)PSXM(madr);
7a8d521f	141	if (ptr == INVALID_PTR) {
ef79bbde P	142	#ifdef CPU_LOG
	143	CPU_LOG("* DMA2 GPU - vram2mem * NULL Pointer!!!\n");
	144	#endif
	145	break;
	146	}
57a757ce	147	// BA blocks * BS words (word = 32-bits)
58ebb94c	148	words = (bcr >> 16) * (bcr & 0xffff);
	149	GPU_readDataMem(ptr, words);
	150	psxCpu->Clear(madr, words);
	151
	152	HW_DMA2_MADR = SWAPu32(madr + words * 4);
57a757ce	153
57a757ce	154	// already 32-bit word size ((size * 4) / 4)
58ebb94c	155	GPUDMA_INT(words / 4);
57a757ce	156	return;
ef79bbde P	157
	158	case 0x01000201: // mem2vram
	159	#ifdef PSXDMA_LOG
57a757ce	160	PSXDMA_LOG("* DMA 2 - GPU mem2vram * %lx addr = %lx size = %lx\n", chcr, madr, bcr);
ef79bbde P	161	#endif
ef79bbde P	162	ptr = (u32 *)PSXM(madr);
7a8d521f	163	if (ptr == INVALID_PTR) {
ef79bbde P	164	#ifdef CPU_LOG
	165	CPU_LOG("* DMA2 GPU - mem2vram * NULL Pointer!!!\n");
	166	#endif
	167	break;
	168	}
57a757ce	169	// BA blocks * BS words (word = 32-bits)
58ebb94c	170	words = (bcr >> 16) * (bcr & 0xffff);
	171	GPU_writeDataMem(ptr, words);
	172
	173	HW_DMA2_MADR = SWAPu32(madr + words * 4);
57a757ce	174
57a757ce	175	// already 32-bit word size ((size * 4) / 4)
58ebb94c	176	GPUDMA_INT(words / 4);
ef79bbde P	177	return;
	178
	179	case 0x01000401: // dma chain
	180	#ifdef PSXDMA_LOG
57a757ce	181	PSXDMA_LOG("* DMA 2 - GPU dma chain * %lx addr = %lx size = %lx\n", chcr, madr, bcr);
ef79bbde	182	#endif
8c84ba5f	183	// when not emulating walking progress, end immediately
8c84ba5f	184	madr_next = 0xffffff;
57a757ce	185
8c84ba5f	186	do_walking = Config.GpuListWalking;
	187	if (do_walking < 0)
	188	do_walking = Config.hacks.gpu_slow_list_walking;
	189	madr_next_p = do_walking ? &madr_next : NULL;
	190
	191	size = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff, madr_next_p);
b03e0caf	192	if ((int)size <= 0)
b03e0caf	193	size = gpuDmaChainSize(madr);
58ebb94c	194
8c84ba5f	195	HW_GPU_STATUS &= SWAP32(~PSXGPU_nBUSY);
8c84ba5f	196	HW_DMA2_MADR = SWAPu32(madr_next);
58ebb94c	197
57a757ce	198	// Tekken 3 = use 1.0 only (not 1.5x)
	199
	200	// Einhander = parse linked list in pieces (todo)
57a757ce	201	// Rebel Assault 2 = parse linked list in pieces (todo)
57a757ce	202	GPUDMA_INT(size);
57a757ce	203	return;
ef79bbde	204
ef79bbde	205	default:
6c9db47c	206	log_unhandled("* DMA 2 - GPU unknown * %x addr = %x size = %x\n", chcr, madr, bcr);
ef79bbde	207	break;
ef79bbde P	208	}
	209
	210	HW_DMA2_CHCR &= SWAP32(~0x01000000);
	211	DMA_INTERRUPT(2);
	212	}
	213
	214	void gpuInterrupt() {
8c84ba5f	215	if (HW_DMA2_CHCR == SWAP32(0x01000401) && !(HW_DMA2_MADR & SWAP32(0x800000)))
	216	{
	217	u32 size, madr_next = 0xffffff;
	218	size = GPU_dmaChain((u32 *)psxM, HW_DMA2_MADR & 0x1fffff, &madr_next);
	219	HW_DMA2_MADR = SWAPu32(madr_next);
	220	GPUDMA_INT(size);
	221	return;
	222	}
ad418c19	223	if (HW_DMA2_CHCR & SWAP32(0x01000000))
	224	{
	225	HW_DMA2_CHCR &= SWAP32(~0x01000000);
	226	DMA_INTERRUPT(2);
	227	}
086adfff	228	HW_GPU_STATUS \|= SWAP32(PSXGPU_nBUSY); // GPU no longer busy
ef79bbde P	229	}
	230
	231	void psxDma6(u32 madr, u32 bcr, u32 chcr) {
fc4803bd	232	u32 words;
ef79bbde P	233	u32 mem = (u32 )PSXM(madr);
	234
	235	#ifdef PSXDMA_LOG
	236	PSXDMA_LOG("* DMA6 OT * %x addr = %x size = %x\n", chcr, madr, bcr);
	237	#endif
	238
	239	if (chcr == 0x11000002) {
7a8d521f	240	if (mem == INVALID_PTR) {
ef79bbde P	241	#ifdef CPU_LOG
	242	CPU_LOG("* DMA6 OT * NULL Pointer!!!\n");
	243	#endif
	244	HW_DMA6_CHCR &= SWAP32(~0x01000000);
	245	DMA_INTERRUPT(6);
	246	return;
	247	}
	248
57a757ce	249	// already 32-bit size
fc4803bd	250	words = bcr;
57a757ce	251
ef79bbde P	252	while (bcr--) {
	253	*mem-- = SWAP32((madr - 4) & 0xffffff);
	254	madr -= 4;
	255	}
086adfff	256	*++mem = SWAP32(0xffffff);
57a757ce	257
fc4803bd	258	//GPUOTCDMA_INT(size);
	259	// halted
	260	psxRegs.cycle += words;
	261	GPUOTCDMA_INT(16);
57a757ce	262	return;
ef79bbde	263	}
ef79bbde P	264	else {
ef79bbde P	265	// Unknown option
6c9db47c	266	log_unhandled("* DMA6 OT - unknown * %x addr = %x size = %x\n", chcr, madr, bcr);
ef79bbde	267	}
ef79bbde P	268
	269	HW_DMA6_CHCR &= SWAP32(~0x01000000);
	270	DMA_INTERRUPT(6);
	271	}
	272
57a757ce	273	void gpuotcInterrupt()
57a757ce	274	{
ad418c19	275	if (HW_DMA6_CHCR & SWAP32(0x01000000))
	276	{
	277	HW_DMA6_CHCR &= SWAP32(~0x01000000);
	278	DMA_INTERRUPT(6);
	279	}
57a757ce	280	}