drc: add a timing hack for Internal Section
[pcsx_rearmed.git] / libpcsxcore / psxmem.c
CommitLineData
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1/***************************************************************************
2 * Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team *
3 * *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
8 * *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
13 * *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA. *
18 ***************************************************************************/
19
20/*
21* PSX memory functions.
22*/
23
24// TODO: Implement caches & cycle penalty.
25
26#include "psxmem.h"
87e5b45f 27#include "psxmem_map.h"
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28#include "r3000a.h"
29#include "psxhw.h"
fc8145b7 30#include "debug.h"
ce0e7ac9 31
32#include "memmap.h"
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33
34#ifndef MAP_ANONYMOUS
35#define MAP_ANONYMOUS MAP_ANON
36#endif
37
87e5b45f 38void *(*psxMapHook)(unsigned long addr, size_t size, int is_fixed,
39 enum psxMapTag tag);
40void (*psxUnmapHook)(void *ptr, size_t size, enum psxMapTag tag);
41
42void *psxMap(unsigned long addr, size_t size, int is_fixed,
43 enum psxMapTag tag)
44{
45 int flags = MAP_PRIVATE | MAP_ANONYMOUS;
5644b26c 46 int try_ = 0;
b0dd9956 47 unsigned long mask;
87e5b45f 48 void *req, *ret;
49
b0dd9956 50retry:
51 if (psxMapHook != NULL) {
85f23982 52 ret = psxMapHook(addr, size, 0, tag);
53 if (ret == NULL)
54 return NULL;
55 }
56 else {
57 /* avoid MAP_FIXED, it overrides existing mappings.. */
58 /* if (is_fixed)
59 flags |= MAP_FIXED; */
60
61 req = (void *)addr;
62 ret = mmap(req, size, PROT_READ | PROT_WRITE, flags, -1, 0);
63 if (ret == MAP_FAILED)
64 return NULL;
b0dd9956 65 }
87e5b45f 66
b0dd9956 67 if (addr != 0 && ret != (void *)addr) {
68 SysMessage("psxMap: warning: wanted to map @%08x, got %p\n",
69 addr, ret);
70
0069615f 71 if (is_fixed) {
72 psxUnmap(ret, size, tag);
73 return NULL;
74 }
75
5644b26c 76 if (((addr ^ (unsigned long)ret) & ~0xff000000l) && try_ < 2)
b0dd9956 77 {
78 psxUnmap(ret, size, tag);
79
80 // try to use similarly aligned memory instead
81 // (recompiler needs this)
5644b26c 82 mask = try_ ? 0xffff : 0xffffff;
83 addr = ((unsigned long)ret + mask) & ~mask;
84 try_++;
b0dd9956 85 goto retry;
86 }
87 }
87e5b45f 88
89 return ret;
90}
91
92void psxUnmap(void *ptr, size_t size, enum psxMapTag tag)
93{
94 if (psxUnmapHook != NULL) {
95 psxUnmapHook(ptr, size, tag);
96 return;
97 }
98
88901dd2 99 if (ptr)
100 munmap(ptr, size);
87e5b45f 101}
102
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103s8 *psxM = NULL; // Kernel & User Memory (2 Meg)
104s8 *psxP = NULL; // Parallel Port (64K)
105s8 *psxR = NULL; // BIOS ROM (512K)
106s8 *psxH = NULL; // Scratch Pad (1K) & Hardware Registers (8K)
107
108u8 **psxMemWLUT = NULL;
109u8 **psxMemRLUT = NULL;
110
111/* Playstation Memory Map (from Playstation doc by Joshua Walker)
1120x0000_0000-0x0000_ffff Kernel (64K)
1130x0001_0000-0x001f_ffff User Memory (1.9 Meg)
114
1150x1f00_0000-0x1f00_ffff Parallel Port (64K)
116
1170x1f80_0000-0x1f80_03ff Scratch Pad (1024 bytes)
118
1190x1f80_1000-0x1f80_2fff Hardware Registers (8K)
120
1210x1fc0_0000-0x1fc7_ffff BIOS (512K)
122
1230x8000_0000-0x801f_ffff Kernel and User Memory Mirror (2 Meg) Cached
1240x9fc0_0000-0x9fc7_ffff BIOS Mirror (512K) Cached
125
1260xa000_0000-0xa01f_ffff Kernel and User Memory Mirror (2 Meg) Uncached
1270xbfc0_0000-0xbfc7_ffff BIOS Mirror (512K) Uncached
128*/
129
130int psxMemInit() {
131 int i;
132
133 psxMemRLUT = (u8 **)malloc(0x10000 * sizeof(void *));
134 psxMemWLUT = (u8 **)malloc(0x10000 * sizeof(void *));
135 memset(psxMemRLUT, 0, 0x10000 * sizeof(void *));
136 memset(psxMemWLUT, 0, 0x10000 * sizeof(void *));
137
87e5b45f 138 psxM = psxMap(0x80000000, 0x00210000, 1, MAP_TAG_RAM);
a327ad27 139#ifndef RAM_FIXED
a4874585 140 if (psxM == NULL)
f23d3386 141 psxM = psxMap(0x77000000, 0x00210000, 0, MAP_TAG_RAM);
a327ad27 142#endif
87e5b45f 143 if (psxM == NULL) {
a327ad27 144 SysMessage(_("mapping main RAM failed"));
145 return -1;
146 }
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147
148 psxP = &psxM[0x200000];
6d760c92 149 psxH = psxMap(0x1f800000, 0x10000, 0, MAP_TAG_OTHER);
87e5b45f 150 psxR = psxMap(0x1fc00000, 0x80000, 0, MAP_TAG_OTHER);
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151
152 if (psxMemRLUT == NULL || psxMemWLUT == NULL ||
6d760c92 153 psxR == NULL || psxP == NULL || psxH == NULL) {
ef79bbde 154 SysMessage(_("Error allocating memory!"));
88901dd2 155 psxMemShutdown();
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156 return -1;
157 }
158
159// MemR
160 for (i = 0; i < 0x80; i++) psxMemRLUT[i + 0x0000] = (u8 *)&psxM[(i & 0x1f) << 16];
161
162 memcpy(psxMemRLUT + 0x8000, psxMemRLUT, 0x80 * sizeof(void *));
163 memcpy(psxMemRLUT + 0xa000, psxMemRLUT, 0x80 * sizeof(void *));
164
165 psxMemRLUT[0x1f00] = (u8 *)psxP;
166 psxMemRLUT[0x1f80] = (u8 *)psxH;
167
168 for (i = 0; i < 0x08; i++) psxMemRLUT[i + 0x1fc0] = (u8 *)&psxR[i << 16];
169
170 memcpy(psxMemRLUT + 0x9fc0, psxMemRLUT + 0x1fc0, 0x08 * sizeof(void *));
171 memcpy(psxMemRLUT + 0xbfc0, psxMemRLUT + 0x1fc0, 0x08 * sizeof(void *));
172
173// MemW
174 for (i = 0; i < 0x80; i++) psxMemWLUT[i + 0x0000] = (u8 *)&psxM[(i & 0x1f) << 16];
175
176 memcpy(psxMemWLUT + 0x8000, psxMemWLUT, 0x80 * sizeof(void *));
177 memcpy(psxMemWLUT + 0xa000, psxMemWLUT, 0x80 * sizeof(void *));
178
fa18abb2 179 // Don't allow writes to PIO Expansion region (psxP) to take effect.
180 // NOTE: Not sure if this is needed to fix any games but seems wise,
181 // seeing as some games do read from PIO as part of copy-protection
182 // check. (See fix in psxMemReset() regarding psxP region reads).
183 psxMemWLUT[0x1f00] = NULL;
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184 psxMemWLUT[0x1f80] = (u8 *)psxH;
185
186 return 0;
187}
188
189void psxMemReset() {
190 FILE *f = NULL;
191 char bios[1024];
192
193 memset(psxM, 0, 0x00200000);
23643ee7 194 memset(psxP, 0xff, 0x00010000);
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195
196 if (strcmp(Config.Bios, "HLE") != 0) {
197 sprintf(bios, "%s/%s", Config.BiosDir, Config.Bios);
198 f = fopen(bios, "rb");
199
200 if (f == NULL) {
201 SysMessage(_("Could not open BIOS:\"%s\". Enabling HLE Bios!\n"), bios);
202 memset(psxR, 0, 0x80000);
203 Config.HLE = TRUE;
204 } else {
205 fread(psxR, 1, 0x80000, f);
206 fclose(f);
207 Config.HLE = FALSE;
208 }
209 } else Config.HLE = TRUE;
210}
211
212void psxMemShutdown() {
88901dd2 213 psxUnmap(psxM, 0x00210000, MAP_TAG_RAM); psxM = NULL;
214 psxUnmap(psxH, 0x10000, MAP_TAG_OTHER); psxH = NULL;
215 psxUnmap(psxR, 0x80000, MAP_TAG_OTHER); psxR = NULL;
ef79bbde 216
88901dd2 217 free(psxMemRLUT); psxMemRLUT = NULL;
218 free(psxMemWLUT); psxMemWLUT = NULL;
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219}
220
221static int writeok = 1;
222
223u8 psxMemRead8(u32 mem) {
224 char *p;
225 u32 t;
226
227 t = mem >> 16;
9dd7d179 228 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
229 if ((mem & 0xffff) < 0x400)
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230 return psxHu8(mem);
231 else
232 return psxHwRead8(mem);
233 } else {
234 p = (char *)(psxMemRLUT[t]);
235 if (p != NULL) {
236 if (Config.Debug)
237 DebugCheckBP((mem & 0xffffff) | 0x80000000, R1);
238 return *(u8 *)(p + (mem & 0xffff));
239 } else {
240#ifdef PSXMEM_LOG
241 PSXMEM_LOG("err lb %8.8lx\n", mem);
242#endif
943a507a 243 return 0xFF;
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244 }
245 }
246}
247
248u16 psxMemRead16(u32 mem) {
249 char *p;
250 u32 t;
251
252 t = mem >> 16;
9dd7d179 253 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
254 if ((mem & 0xffff) < 0x400)
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255 return psxHu16(mem);
256 else
257 return psxHwRead16(mem);
258 } else {
259 p = (char *)(psxMemRLUT[t]);
260 if (p != NULL) {
261 if (Config.Debug)
262 DebugCheckBP((mem & 0xffffff) | 0x80000000, R2);
263 return SWAPu16(*(u16 *)(p + (mem & 0xffff)));
264 } else {
265#ifdef PSXMEM_LOG
266 PSXMEM_LOG("err lh %8.8lx\n", mem);
267#endif
943a507a 268 return 0xFFFF;
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269 }
270 }
271}
272
273u32 psxMemRead32(u32 mem) {
274 char *p;
275 u32 t;
276
277 t = mem >> 16;
9dd7d179 278 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
279 if ((mem & 0xffff) < 0x400)
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280 return psxHu32(mem);
281 else
282 return psxHwRead32(mem);
283 } else {
284 p = (char *)(psxMemRLUT[t]);
285 if (p != NULL) {
286 if (Config.Debug)
287 DebugCheckBP((mem & 0xffffff) | 0x80000000, R4);
288 return SWAPu32(*(u32 *)(p + (mem & 0xffff)));
289 } else {
290#ifdef PSXMEM_LOG
291 if (writeok) { PSXMEM_LOG("err lw %8.8lx\n", mem); }
292#endif
943a507a 293 return 0xFFFFFFFF;
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294 }
295 }
296}
297
298void psxMemWrite8(u32 mem, u8 value) {
299 char *p;
300 u32 t;
301
302 t = mem >> 16;
9dd7d179 303 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
304 if ((mem & 0xffff) < 0x400)
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305 psxHu8(mem) = value;
306 else
307 psxHwWrite8(mem, value);
308 } else {
309 p = (char *)(psxMemWLUT[t]);
310 if (p != NULL) {
311 if (Config.Debug)
312 DebugCheckBP((mem & 0xffffff) | 0x80000000, W1);
313 *(u8 *)(p + (mem & 0xffff)) = value;
41e82ad4 314#ifndef DRC_DISABLE
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315 psxCpu->Clear((mem & (~3)), 1);
316#endif
317 } else {
318#ifdef PSXMEM_LOG
319 PSXMEM_LOG("err sb %8.8lx\n", mem);
320#endif
321 }
322 }
323}
324
325void psxMemWrite16(u32 mem, u16 value) {
326 char *p;
327 u32 t;
328
329 t = mem >> 16;
9dd7d179 330 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
331 if ((mem & 0xffff) < 0x400)
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332 psxHu16ref(mem) = SWAPu16(value);
333 else
334 psxHwWrite16(mem, value);
335 } else {
336 p = (char *)(psxMemWLUT[t]);
337 if (p != NULL) {
338 if (Config.Debug)
339 DebugCheckBP((mem & 0xffffff) | 0x80000000, W2);
340 *(u16 *)(p + (mem & 0xffff)) = SWAPu16(value);
41e82ad4 341#ifndef DRC_DISABLE
3e31e934 342 psxCpu->Clear((mem & (~3)), 1);
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343#endif
344 } else {
345#ifdef PSXMEM_LOG
346 PSXMEM_LOG("err sh %8.8lx\n", mem);
347#endif
348 }
349 }
350}
351
352void psxMemWrite32(u32 mem, u32 value) {
353 char *p;
354 u32 t;
355
356// if ((mem&0x1fffff) == 0x71E18 || value == 0x48088800) SysPrintf("t2fix!!\n");
357 t = mem >> 16;
9dd7d179 358 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
359 if ((mem & 0xffff) < 0x400)
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360 psxHu32ref(mem) = SWAPu32(value);
361 else
362 psxHwWrite32(mem, value);
363 } else {
364 p = (char *)(psxMemWLUT[t]);
365 if (p != NULL) {
366 if (Config.Debug)
367 DebugCheckBP((mem & 0xffffff) | 0x80000000, W4);
368 *(u32 *)(p + (mem & 0xffff)) = SWAPu32(value);
41e82ad4 369#ifndef DRC_DISABLE
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370 psxCpu->Clear(mem, 1);
371#endif
372 } else {
373 if (mem != 0xfffe0130) {
41e82ad4 374#ifndef DRC_DISABLE
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375 if (!writeok)
376 psxCpu->Clear(mem, 1);
377#endif
378
379#ifdef PSXMEM_LOG
380 if (writeok) { PSXMEM_LOG("err sw %8.8lx\n", mem); }
381#endif
382 } else {
383 int i;
384
385 switch (value) {
386 case 0x800: case 0x804:
387 if (writeok == 0) break;
388 writeok = 0;
389 memset(psxMemWLUT + 0x0000, 0, 0x80 * sizeof(void *));
390 memset(psxMemWLUT + 0x8000, 0, 0x80 * sizeof(void *));
391 memset(psxMemWLUT + 0xa000, 0, 0x80 * sizeof(void *));
7bbabe80 392#ifdef ICACHE_EMULATION
393 /* Required for icache interpreter otherwise Armored Core won't boot on icache interpreter */
394 psxCpu->Notify(R3000ACPU_NOTIFY_CACHE_ISOLATED, NULL);
395#endif
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396 break;
397 case 0x00: case 0x1e988:
398 if (writeok == 1) break;
399 writeok = 1;
400 for (i = 0; i < 0x80; i++) psxMemWLUT[i + 0x0000] = (void *)&psxM[(i & 0x1f) << 16];
401 memcpy(psxMemWLUT + 0x8000, psxMemWLUT, 0x80 * sizeof(void *));
402 memcpy(psxMemWLUT + 0xa000, psxMemWLUT, 0x80 * sizeof(void *));
7bbabe80 403#ifdef ICACHE_EMULATION
404 /* Dynarecs might take this opportunity to flush their code cache */
405 psxCpu->Notify(R3000ACPU_NOTIFY_CACHE_UNISOLATED, NULL);
406#endif
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407 break;
408 default:
409#ifdef PSXMEM_LOG
410 PSXMEM_LOG("unk %8.8lx = %x\n", mem, value);
411#endif
412 break;
413 }
414 }
415 }
416 }
417}
418
419void *psxMemPointer(u32 mem) {
420 char *p;
421 u32 t;
422
423 t = mem >> 16;
9dd7d179 424 if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
425 if ((mem & 0xffff) < 0x400)
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426 return (void *)&psxH[mem];
427 else
428 return NULL;
429 } else {
430 p = (char *)(psxMemWLUT[t]);
431 if (p != NULL) {
432 return (void *)(p + (mem & 0xffff));
433 }
434 return NULL;
435 }
436}