[pcsx_rearmed.git] / libpcsxcore / r3000a.c

/***************************************************************************
 *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
 *                                                                         *
 *   This program is free software; you can redistribute it and/or modify  *
 *   it under the terms of the GNU General Public License as published by  *
 *   the Free Software Foundation; either version 2 of the License, or     *
 *   (at your option) any later version.                                   *
 *                                                                         *
 *   This program is distributed in the hope that it will be useful,       *
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
 *   GNU General Public License for more details.                          *
 *                                                                         *
 *   You should have received a copy of the GNU General Public License     *
 *   along with this program; if not, write to the                         *
 *   Free Software Foundation, Inc.,                                       *
 *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
 ***************************************************************************/

/*
* R3000A CPU functions.
*/

#include "r3000a.h"
#include "cdrom.h"
#include "mdec.h"
#include "gte.h"
#include "psxinterpreter.h"

R3000Acpu *psxCpu = NULL;
#ifdef DRC_DISABLE
psxRegisters psxRegs;
#endif

int psxInit() {
	SysPrintf(_("Running PCSX Version %s (%s).\n"), PACKAGE_VERSION, __DATE__);

#ifndef DRC_DISABLE
	if (Config.Cpu == CPU_INTERPRETER) {
		psxCpu = &psxInt;
	} else psxCpu = &psxRec;
#else
	Config.Cpu = CPU_INTERPRETER;
	psxCpu = &psxInt;
#endif

	Log = 0;

	if (psxMemInit() == -1) return -1;

	return psxCpu->Init();
}

void psxReset() {
	psxMemReset();

	memset(&psxRegs, 0, sizeof(psxRegs));

	psxRegs.pc = 0xbfc00000; // Start in bootstrap

	psxRegs.CP0.r[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
	psxRegs.CP0.r[15] = 0x00000002; // PRevID = Revision ID, same as R3000A

	psxCpu->Reset();

	psxHwReset();
	psxBiosInit();

	if (!Config.HLE)
		psxExecuteBios();

#ifdef EMU_LOG
	EMU_LOG("*BIOS END*\n");
#endif
	Log = 0;
}

void psxShutdown() {
	psxMemShutdown();
	psxBiosShutdown();

	psxCpu->Shutdown();
}

void psxException(u32 code, u32 bd) {
	psxRegs.code = PSXMu32(psxRegs.pc);
	
	if (!Config.HLE && ((((psxRegs.code) >> 24) & 0xfe) == 0x4a)) {
		// "hokuto no ken" / "Crash Bandicot 2" ...
		// BIOS does not allow to return to GTE instructions
		// (just skips it, supposedly because it's scheduled already)
		// so we execute it here
		psxCP2[psxRegs.code & 0x3f](&psxRegs.CP2);
	}

	// Set the Cause
	psxRegs.CP0.n.Cause = (psxRegs.CP0.n.Cause & 0x300) | code;

	// Set the EPC & PC
	if (bd) {
#ifdef PSXCPU_LOG
		PSXCPU_LOG("bd set!!!\n");
#endif
		psxRegs.CP0.n.Cause |= 0x80000000;
		psxRegs.CP0.n.EPC = (psxRegs.pc - 4);
	} else
		psxRegs.CP0.n.EPC = (psxRegs.pc);

	if (psxRegs.CP0.n.Status & 0x400000)
		psxRegs.pc = 0xbfc00180;
	else
		psxRegs.pc = 0x80000080;

	// Set the Status
	psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status &~0x3f) |
						  ((psxRegs.CP0.n.Status & 0xf) << 2);

	if (Config.HLE) psxBiosException();
}

void psxBranchTest() {
	if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter)
		psxRcntUpdate();

	if (psxRegs.interrupt) {
		if ((psxRegs.interrupt & (1 << PSXINT_SIO))) { // sio
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SIO].sCycle) >= psxRegs.intCycle[PSXINT_SIO].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_SIO);
				sioInterrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_CDR)) { // cdr
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDR].sCycle) >= psxRegs.intCycle[PSXINT_CDR].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_CDR);
				cdrInterrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_CDREAD)) { // cdr read
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDREAD].sCycle) >= psxRegs.intCycle[PSXINT_CDREAD].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_CDREAD);
				cdrPlayReadInterrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_GPUDMA)) { // gpu dma
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUDMA].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_GPUDMA);
				gpuInterrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_MDECOUTDMA)) { // mdec out dma
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECOUTDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECOUTDMA].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_MDECOUTDMA);
				mdec1Interrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_SPUDMA)) { // spu dma
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_SPUDMA].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_SPUDMA);
				spuInterrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_MDECINDMA)) { // mdec in
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECINDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECINDMA].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_MDECINDMA);
				mdec0Interrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_GPUOTCDMA)) { // gpu otc
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_GPUOTCDMA);
				gpuotcInterrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_CDRDMA)) { // cdrom
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRDMA].sCycle) >= psxRegs.intCycle[PSXINT_CDRDMA].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_CDRDMA);
				cdrDmaInterrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_CDRLID)) { // cdr lid states
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRLID].sCycle) >= psxRegs.intCycle[PSXINT_CDRLID].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_CDRLID);
				cdrLidSeekInterrupt();
			}
		}
		if (psxRegs.interrupt & (1 << PSXINT_SPU_UPDATE)) { // scheduled spu update
			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPU_UPDATE].sCycle) >= psxRegs.intCycle[PSXINT_SPU_UPDATE].cycle) {
				psxRegs.interrupt &= ~(1 << PSXINT_SPU_UPDATE);
				spuUpdate();
			}
		}
	}

	if (psxHu32(0x1070) & psxHu32(0x1074)) {
		if ((psxRegs.CP0.n.Status & 0x401) == 0x401) {
#ifdef PSXCPU_LOG
			PSXCPU_LOG("Interrupt: %x %x\n", psxHu32(0x1070), psxHu32(0x1074));
#endif
//			SysPrintf("Interrupt (%x): %x %x\n", psxRegs.cycle, psxHu32(0x1070), psxHu32(0x1074));
			psxException(0x400, 0);
		}
	}
}

void psxJumpTest() {
	if (!Config.HLE && Config.PsxOut) {
		u32 call = psxRegs.GPR.n.t1 & 0xff;
		switch (psxRegs.pc & 0x1fffff) {
			case 0xa0:
#ifdef PSXBIOS_LOG
				if (call != 0x28 && call != 0xe) {
					PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x\n", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
#endif
				if (biosA0[call])
					biosA0[call]();
				break;
			case 0xb0:
#ifdef PSXBIOS_LOG
				if (call != 0x17 && call != 0xb) {
					PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x\n", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
#endif
				if (biosB0[call])
					biosB0[call]();
				break;
			case 0xc0:
#ifdef PSXBIOS_LOG
				PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3);
#endif
				if (biosC0[call])
					biosC0[call]();
				break;
		}
	}
}

void psxExecuteBios() {
	while (psxRegs.pc != 0x80030000)
		psxCpu->ExecuteBlock();
}
Commit	Line	Data
ef79bbde P	1	/***************************************************************************
	2	* Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team *
	3	* *
	4	* This program is free software; you can redistribute it and/or modify *
	5	* it under the terms of the GNU General Public License as published by *
	6	* the Free Software Foundation; either version 2 of the License, or *
	7	* (at your option) any later version. *
	8	* *
	9	* This program is distributed in the hope that it will be useful, *
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of *
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
	12	* GNU General Public License for more details. *
	13	* *
	14	* You should have received a copy of the GNU General Public License *
	15	* along with this program; if not, write to the *
	16	* Free Software Foundation, Inc., *
	17	* 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA. *
	18	***************************************************************************/
	19
	20	/*
	21	* R3000A CPU functions.
	22	*/
	23
	24	#include "r3000a.h"
	25	#include "cdrom.h"
	26	#include "mdec.h"
	27	#include "gte.h"
61ad2a61	28	#include "psxinterpreter.h"
ef79bbde P	29
ef79bbde P	30	R3000Acpu *psxCpu = NULL;
41e82ad4	31	#ifdef DRC_DISABLE
ef79bbde	32	psxRegisters psxRegs;
41e82ad4	33	#endif
ef79bbde P	34
	35	int psxInit() {
	36	SysPrintf(_("Running PCSX Version %s (%s).\n"), PACKAGE_VERSION, __DATE__);
	37
41e82ad4	38	#ifndef DRC_DISABLE
ef79bbde P	39	if (Config.Cpu == CPU_INTERPRETER) {
	40	psxCpu = &psxInt;
	41	} else psxCpu = &psxRec;
	42	#else
61ad2a61	43	Config.Cpu = CPU_INTERPRETER;
ef79bbde P	44	psxCpu = &psxInt;
	45	#endif
	46
	47	Log = 0;
	48
	49	if (psxMemInit() == -1) return -1;
	50
	51	return psxCpu->Init();
	52	}
	53
	54	void psxReset() {
ef79bbde P	55	psxMemReset();
	56
	57	memset(&psxRegs, 0, sizeof(psxRegs));
	58
	59	psxRegs.pc = 0xbfc00000; // Start in bootstrap
	60
	61	psxRegs.CP0.r[12] = 0x10900000; // COP0 enabled \| BEV = 1 \| TS = 1
	62	psxRegs.CP0.r[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
	63
c24732c0	64	psxCpu->Reset();
c24732c0	65
ef79bbde P	66	psxHwReset();
	67	psxBiosInit();
	68
	69	if (!Config.HLE)
	70	psxExecuteBios();
	71
	72	#ifdef EMU_LOG
	73	EMU_LOG("BIOS END\n");
	74	#endif
	75	Log = 0;
	76	}
	77
	78	void psxShutdown() {
	79	psxMemShutdown();
	80	psxBiosShutdown();
	81
	82	psxCpu->Shutdown();
	83	}
	84
	85	void psxException(u32 code, u32 bd) {
4cc373dd	86	psxRegs.code = PSXMu32(psxRegs.pc);
943a507a	87
943a507a	88	if (!Config.HLE && ((((psxRegs.code) >> 24) & 0xfe) == 0x4a)) {
665e364a	89	// "hokuto no ken" / "Crash Bandicot 2" ...
	90	// BIOS does not allow to return to GTE instructions
	91	// (just skips it, supposedly because it's scheduled already)
62656449	92	// so we execute it here
4cc373dd	93	psxCP2[psxRegs.code & 0x3f](&psxRegs.CP2);
665e364a	94	}
665e364a	95
ef79bbde	96	// Set the Cause
48e74ef5	97	psxRegs.CP0.n.Cause = (psxRegs.CP0.n.Cause & 0x300) \| code;
ef79bbde P	98
	99	// Set the EPC & PC
	100	if (bd) {
	101	#ifdef PSXCPU_LOG
	102	PSXCPU_LOG("bd set!!!\n");
	103	#endif
ef79bbde P	104	psxRegs.CP0.n.Cause \|= 0x80000000;
	105	psxRegs.CP0.n.EPC = (psxRegs.pc - 4);
	106	} else
	107	psxRegs.CP0.n.EPC = (psxRegs.pc);
	108
	109	if (psxRegs.CP0.n.Status & 0x400000)
	110	psxRegs.pc = 0xbfc00180;
	111	else
	112	psxRegs.pc = 0x80000080;
	113
	114	// Set the Status
	115	psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status &~0x3f) \|
	116	((psxRegs.CP0.n.Status & 0xf) << 2);
	117
ef79bbde P	118	if (Config.HLE) psxBiosException();
	119	}
	120
	121	void psxBranchTest() {
	122	if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter)
	123	psxRcntUpdate();
	124
	125	if (psxRegs.interrupt) {
d014a471	126	if ((psxRegs.interrupt & (1 << PSXINT_SIO))) { // sio
d28b54b1	127	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SIO].sCycle) >= psxRegs.intCycle[PSXINT_SIO].cycle) {
d28b54b1	128	psxRegs.interrupt &= ~(1 << PSXINT_SIO);
ef79bbde P	129	sioInterrupt();
	130	}
	131	}
d28b54b1	132	if (psxRegs.interrupt & (1 << PSXINT_CDR)) { // cdr
	133	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDR].sCycle) >= psxRegs.intCycle[PSXINT_CDR].cycle) {
	134	psxRegs.interrupt &= ~(1 << PSXINT_CDR);
ef79bbde P	135	cdrInterrupt();
	136	}
	137	}
d28b54b1	138	if (psxRegs.interrupt & (1 << PSXINT_CDREAD)) { // cdr read
	139	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDREAD].sCycle) >= psxRegs.intCycle[PSXINT_CDREAD].cycle) {
	140	psxRegs.interrupt &= ~(1 << PSXINT_CDREAD);
480e570b	141	cdrPlayReadInterrupt();
ef79bbde P	142	}
ef79bbde P	143	}
d28b54b1	144	if (psxRegs.interrupt & (1 << PSXINT_GPUDMA)) { // gpu dma
	145	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUDMA].cycle) {
	146	psxRegs.interrupt &= ~(1 << PSXINT_GPUDMA);
ef79bbde P	147	gpuInterrupt();
	148	}
	149	}
d28b54b1	150	if (psxRegs.interrupt & (1 << PSXINT_MDECOUTDMA)) { // mdec out dma
	151	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECOUTDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECOUTDMA].cycle) {
	152	psxRegs.interrupt &= ~(1 << PSXINT_MDECOUTDMA);
ef79bbde P	153	mdec1Interrupt();
	154	}
	155	}
d28b54b1	156	if (psxRegs.interrupt & (1 << PSXINT_SPUDMA)) { // spu dma
	157	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_SPUDMA].cycle) {
	158	psxRegs.interrupt &= ~(1 << PSXINT_SPUDMA);
ef79bbde P	159	spuInterrupt();
	160	}
	161	}
528ad661	162	if (psxRegs.interrupt & (1 << PSXINT_MDECINDMA)) { // mdec in
	163	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECINDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECINDMA].cycle) {
	164	psxRegs.interrupt &= ~(1 << PSXINT_MDECINDMA);
	165	mdec0Interrupt();
	166	}
	167	}
57a757ce	168	if (psxRegs.interrupt & (1 << PSXINT_GPUOTCDMA)) { // gpu otc
	169	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle) {
	170	psxRegs.interrupt &= ~(1 << PSXINT_GPUOTCDMA);
	171	gpuotcInterrupt();
	172	}
	173	}
9f8b032d	174	if (psxRegs.interrupt & (1 << PSXINT_CDRDMA)) { // cdrom
	175	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRDMA].sCycle) >= psxRegs.intCycle[PSXINT_CDRDMA].cycle) {
	176	psxRegs.interrupt &= ~(1 << PSXINT_CDRDMA);
	177	cdrDmaInterrupt();
	178	}
	179	}
	180	if (psxRegs.interrupt & (1 << PSXINT_CDRLID)) { // cdr lid states
	181	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDRLID].sCycle) >= psxRegs.intCycle[PSXINT_CDRLID].cycle) {
	182	psxRegs.interrupt &= ~(1 << PSXINT_CDRLID);
	183	cdrLidSeekInterrupt();
	184	}
	185	}
2b30c129	186	if (psxRegs.interrupt & (1 << PSXINT_SPU_UPDATE)) { // scheduled spu update
	187	if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPU_UPDATE].sCycle) >= psxRegs.intCycle[PSXINT_SPU_UPDATE].cycle) {
	188	psxRegs.interrupt &= ~(1 << PSXINT_SPU_UPDATE);
	189	spuUpdate();
	190	}
	191	}
ef79bbde P	192	}
	193
	194	if (psxHu32(0x1070) & psxHu32(0x1074)) {
	195	if ((psxRegs.CP0.n.Status & 0x401) == 0x401) {
	196	#ifdef PSXCPU_LOG
	197	PSXCPU_LOG("Interrupt: %x %x\n", psxHu32(0x1070), psxHu32(0x1074));
	198	#endif
	199	// SysPrintf("Interrupt (%x): %x %x\n", psxRegs.cycle, psxHu32(0x1070), psxHu32(0x1074));
	200	psxException(0x400, 0);
	201	}
	202	}
	203	}
	204
	205	void psxJumpTest() {
	206	if (!Config.HLE && Config.PsxOut) {
	207	u32 call = psxRegs.GPR.n.t1 & 0xff;
	208	switch (psxRegs.pc & 0x1fffff) {
	209	case 0xa0:
	210	#ifdef PSXBIOS_LOG
	211	if (call != 0x28 && call != 0xe) {
	212	PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x\n", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
	213	#endif
	214	if (biosA0[call])
	215	biosA0[call]();
	216	break;
	217	case 0xb0:
	218	#ifdef PSXBIOS_LOG
	219	if (call != 0x17 && call != 0xb) {
	220	PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x\n", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }
	221	#endif
	222	if (biosB0[call])
	223	biosB0[call]();
	224	break;
	225	case 0xc0:
	226	#ifdef PSXBIOS_LOG
	227	PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3);
	228	#endif
	229	if (biosC0[call])
	230	biosC0[call]();
	231	break;
	232	}
	233	}
	234	}
	235
	236	void psxExecuteBios() {
	237	while (psxRegs.pc != 0x80030000)
	238	psxCpu->ExecuteBlock();
	239	}
	240