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rm leftover debug code
[pcsx_rearmed.git] / plugins / dfsound / registers.c
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ef79bbde
P		 1/***************************************************************************\r
2 registers.c - description\r
3 -------------------\r
4 begin : Wed May 15 2002\r
5 copyright : (C) 2002 by Pete Bernert\r
6 email : BlackDove@addcom.de\r
7 ***************************************************************************/\r
8/***************************************************************************\r
9 * *\r
10 * This program is free software; you can redistribute it and/or modify *\r
11 * it under the terms of the GNU General Public License as published by *\r
12 * the Free Software Foundation; either version 2 of the License, or *\r
13 * (at your option) any later version. See also the license.txt file for *\r
14 * additional informations. *\r
15 * *\r
16 ***************************************************************************/\r
17\r
18#include "stdafx.h"\r
19\r
20#define _IN_REGISTERS\r
21\r
22#include "externals.h"\r
23#include "registers.h"\r
3154bfab 24#include "spu_config.h"\r
a4621d43 25#include "spu.h"\r
ef79bbde 26\r
7e44d49d 27static void SoundOn(int start,int end,unsigned short val);\r
28static void SoundOff(int start,int end,unsigned short val);\r
29static void FModOn(int start,int end,unsigned short val);\r
30static void NoiseOn(int start,int end,unsigned short val);\r
31static void SetVolumeL(unsigned char ch,short vol);\r
32static void SetVolumeR(unsigned char ch,short vol);\r
33static void SetPitch(int ch,unsigned short val);\r
34static void ReverbOn(int start,int end,unsigned short val);\r
35\r
ef79bbde
P		 36////////////////////////////////////////////////////////////////////////\r
37// WRITE REGISTERS: called by main emu\r
38////////////////////////////////////////////////////////////////////////\r
39\r
4b22d950 40static const uint32_t ignore_dupe[16] = {\r
650adfd2 41 // ch 0-15 c40 c80 cc0\r
42 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f, 0x7f7f7f7f,\r
43 // ch 16-24 d40 control reverb\r
4b22d950 44 0x7f7f7f7f, 0x7f7f7f7f, 0xff05ff0f, 0xffffffff,\r
45 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,\r
46 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff\r
650adfd2 47};\r
48\r
49void CALLBACK SPUwriteRegister(unsigned long reg, unsigned short val,\r
50 unsigned int cycles)\r
ef79bbde 51{\r
4b22d950 52 int r = reg & 0xffe;\r
650adfd2 53 int rofs = (r - 0xc00) >> 1;\r
3154bfab 54 int changed = spu.regArea[rofs] != val;\r
55 spu.regArea[rofs] = val;\r
650adfd2 56\r
57 if (!changed && (ignore_dupe[rofs >> 5] & (1 << (rofs & 0x1f))))\r
58 return;\r
59 // zero keyon/keyoff?\r
60 if (val == 0 && (r & 0xff8) == 0xd88)\r
61 return;\r
62\r
63a4f6b6 63 do_samples_if_needed(cycles, 0);\r
ef79bbde
P		 64\r
65 if(r>=0x0c00 && r<0x0d80) // some channel info?\r
66 {\r
67 int ch=(r>>4)-0xc0; // calc channel\r
68 switch(r&0x0f)\r
69 {\r
70 //------------------------------------------------// r volume\r
71 case 0: \r
72 SetVolumeL((unsigned char)ch,val);\r
73 break;\r
74 //------------------------------------------------// l volume\r
75 case 2: \r
76 SetVolumeR((unsigned char)ch,val);\r
77 break;\r
78 //------------------------------------------------// pitch\r
79 case 4: \r
80 SetPitch(ch,val);\r
650adfd2 81 goto upd_irq;\r
ef79bbde
P		 82 //------------------------------------------------// start\r
83 case 6: \r
7e44d49d 84 // taken from regArea later\r
ef79bbde
P		 85 break;\r
86 //------------------------------------------------// level with pre-calcs\r
87 case 8:\r
88 {\r
6d866bb7 89 const unsigned long lval=val;\r
ef79bbde 90 //---------------------------------------------//\r
5514a050 91 spu.s_chan[ch].ADSRX.AttackModeExp=(lval&0x8000)?1:0;\r
92 spu.s_chan[ch].ADSRX.AttackRate=(lval>>8) & 0x007f;\r
93 spu.s_chan[ch].ADSRX.DecayRate=(lval>>4) & 0x000f;\r
94 spu.s_chan[ch].ADSRX.SustainLevel=lval & 0x000f;\r
ef79bbde 95 //---------------------------------------------//\r
ef79bbde
P		 96 }\r
97 break;\r
98 //------------------------------------------------// adsr times with pre-calcs\r
99 case 10:\r
100 {\r
6d866bb7 101 const unsigned long lval=val;\r
ef79bbde
P		 102\r
103 //----------------------------------------------//\r
5514a050 104 spu.s_chan[ch].ADSRX.SustainModeExp = (lval&0x8000)?1:0;\r
105 spu.s_chan[ch].ADSRX.SustainIncrease= (lval&0x4000)?0:1;\r
106 spu.s_chan[ch].ADSRX.SustainRate = (lval>>6) & 0x007f;\r
107 spu.s_chan[ch].ADSRX.ReleaseModeExp = (lval&0x0020)?1:0;\r
108 spu.s_chan[ch].ADSRX.ReleaseRate = lval & 0x001f;\r
ef79bbde 109 //----------------------------------------------//\r
ef79bbde
P		 110 }\r
111 break;\r
112 //------------------------------------------------// adsr volume... mmm have to investigate this\r
113 case 12:\r
114 break;\r
115 //------------------------------------------------//\r
116 case 14: // loop?\r
5514a050 117 spu.s_chan[ch].pLoop=spu.spuMemC+((val&~1)<<3);\r
16f3ca66 118 spu.s_chan[ch].bIgnoreLoop = 1;\r
650adfd2 119 goto upd_irq;\r
ef79bbde
P		 120 //------------------------------------------------//\r
121 }\r
ef79bbde
P		 122 return;\r
123 }\r
4b22d950 124 else if (0x0e00 <= r && r < 0x0e60)\r
125 {\r
126 int ch = (r >> 2) & 0x1f;\r
127 log_unhandled("c%02d w %cvol %04x\n", ch, (r & 2) ? 'r' : 'l', val);\r
128 spu.s_chan[ch].iVolume[(r >> 1) & 1] = (signed short)val >> 1;\r
129 }\r
ef79bbde
P		 130\r
131 switch(r)\r
132 {\r
133 //-------------------------------------------------//\r
134 case H_SPUaddr:\r
3154bfab 135 spu.spuAddr = (unsigned long) val<<3;\r
3c7a8977 136 //check_irq_io(spu.spuAddr);\r
ef79bbde
P		 137 break;\r
138 //-------------------------------------------------//\r
139 case H_SPUdata:\r
a4621d43 140 *(unsigned short *)(spu.spuMemC + spu.spuAddr) = HTOLE16(val);\r
5514a050 141 spu.spuAddr += 2;\r
142 spu.spuAddr &= 0x7fffe;\r
3c7a8977 143 check_irq_io(spu.spuAddr);\r
ef79bbde
P		 144 break;\r
145 //-------------------------------------------------//\r
146 case H_SPUctrl:\r
3154bfab 147 if (!(spu.spuCtrl & CTRL_IRQ)) {\r
148 spu.spuStat&=~STAT_IRQ;\r
650adfd2 149 if (val & CTRL_IRQ)\r
150 schedule_next_irq();\r
151 }\r
3154bfab 152 spu.spuCtrl=val;\r
ef79bbde
P		 153 break;\r
154 //-------------------------------------------------//\r
155 case H_SPUstat:\r
3154bfab 156 spu.spuStat=val&0xf800;\r
ef79bbde
P		 157 break;\r
158 //-------------------------------------------------//\r
159 case H_SPUReverbAddr:\r
650adfd2 160 goto rvbd;\r
ef79bbde
P		 161 //-------------------------------------------------//\r
162 case H_SPUirqAddr:\r
a5ff8be2 163 //if (val & 1)\r
164 // log_unhandled("w irq with lsb: %08lx %04x\n", reg, val);\r
3c7a8977 165 spu.pSpuIrq = spu.spuMemC + (((int)val << 3) & ~0xf);\r
166 //check_irq_io(spu.spuAddr);\r
650adfd2 167 goto upd_irq;\r
ef79bbde
P		 168 //-------------------------------------------------//\r
169 case H_SPUrvolL:\r
05c7cec7 170 spu.rvb->VolLeft=val;\r
ef79bbde
P		 171 break;\r
172 //-------------------------------------------------//\r
173 case H_SPUrvolR:\r
05c7cec7 174 spu.rvb->VolRight=val;\r
ef79bbde
P		 175 break;\r
176 //-------------------------------------------------//\r
177\r
6c9db47c 178 case H_SPUmvolL:\r
179 case H_SPUmvolR:\r
180 if (val & 0x8000)\r
181 log_unhandled("w master sweep: %08lx %04x\n", reg, val);\r
182 break;\r
183\r
184 case 0x0dac:\r
185 if (val != 4)\r
186 log_unhandled("1f801dac %04x\n", val);\r
187 break;\r
188\r
ef79bbde
P		 189/*\r
190 case H_ExtLeft:\r
191 //auxprintf("EL %d\n",val);\r
192 break;\r
193 //-------------------------------------------------//\r
194 case H_ExtRight:\r
195 //auxprintf("ER %d\n",val);\r
196 break;\r
197 //-------------------------------------------------//\r
198 case H_SPUmvolL:\r
199 //auxprintf("ML %d\n",val);\r
200 break;\r
201 //-------------------------------------------------//\r
202 case H_SPUmvolR:\r
203 //auxprintf("MR %d\n",val);\r
204 break;\r
205 //-------------------------------------------------//\r
206 case H_SPUMute1:\r
207 //auxprintf("M0 %04x\n",val);\r
208 break;\r
209 //-------------------------------------------------//\r
210 case H_SPUMute2:\r
211 //auxprintf("M1 %04x\n",val);\r
212 break;\r
213*/\r
214 //-------------------------------------------------//\r
215 case H_SPUon1:\r
216 SoundOn(0,16,val);\r
217 break;\r
218 //-------------------------------------------------//\r
219 case H_SPUon2:\r
220 SoundOn(16,24,val);\r
221 break;\r
222 //-------------------------------------------------//\r
223 case H_SPUoff1:\r
224 SoundOff(0,16,val);\r
225 break;\r
226 //-------------------------------------------------//\r
227 case H_SPUoff2:\r
228 SoundOff(16,24,val);\r
229 break;\r
230 //-------------------------------------------------//\r
231 case H_CDLeft:\r
b64fb891 232 spu.iLeftXAVol=(int16_t)val;\r
233 if(spu.cddavCallback) spu.cddavCallback(0,(int16_t)val);\r
ef79bbde
P		 234 break;\r
235 case H_CDRight:\r
b64fb891 236 spu.iRightXAVol=(int16_t)val;\r
237 if(spu.cddavCallback) spu.cddavCallback(1,(int16_t)val);\r
ef79bbde
P		 238 break;\r
239 //-------------------------------------------------//\r
240 case H_FMod1:\r
241 FModOn(0,16,val);\r
242 break;\r
243 //-------------------------------------------------//\r
244 case H_FMod2:\r
245 FModOn(16,24,val);\r
246 break;\r
247 //-------------------------------------------------//\r
248 case H_Noise1:\r
249 NoiseOn(0,16,val);\r
250 break;\r
251 //-------------------------------------------------//\r
252 case H_Noise2:\r
253 NoiseOn(16,24,val);\r
254 break;\r
255 //-------------------------------------------------//\r
256 case H_RVBon1:\r
257 ReverbOn(0,16,val);\r
258 break;\r
259 //-------------------------------------------------//\r
260 case H_RVBon2:\r
261 ReverbOn(16,24,val);\r
262 break;\r
263 //-------------------------------------------------//\r
7b2c4897 264 case H_Reverb+0 : goto rvbd;\r
265 case H_Reverb+2 : goto rvbd;\r
266 case H_Reverb+4 : spu.rvb->IIR_ALPHA=(short)val; break;\r
267 case H_Reverb+6 : spu.rvb->ACC_COEF_A=(short)val; break;\r
268 case H_Reverb+8 : spu.rvb->ACC_COEF_B=(short)val; break;\r
269 case H_Reverb+10 : spu.rvb->ACC_COEF_C=(short)val; break;\r
270 case H_Reverb+12 : spu.rvb->ACC_COEF_D=(short)val; break;\r
271 case H_Reverb+14 : spu.rvb->IIR_COEF=(short)val; break;\r
272 case H_Reverb+16 : spu.rvb->FB_ALPHA=(short)val; break;\r
273 case H_Reverb+18 : spu.rvb->FB_X=(short)val; break;\r
274 case H_Reverb+20 : goto rvbd;\r
275 case H_Reverb+22 : goto rvbd;\r
276 case H_Reverb+24 : goto rvbd;\r
277 case H_Reverb+26 : goto rvbd;\r
278 case H_Reverb+28 : goto rvbd;\r
279 case H_Reverb+30 : goto rvbd;\r
280 case H_Reverb+32 : goto rvbd;\r
281 case H_Reverb+34 : goto rvbd;\r
282 case H_Reverb+36 : goto rvbd;\r
283 case H_Reverb+38 : goto rvbd;\r
284 case H_Reverb+40 : goto rvbd;\r
285 case H_Reverb+42 : goto rvbd;\r
286 case H_Reverb+44 : goto rvbd;\r
287 case H_Reverb+46 : goto rvbd;\r
288 case H_Reverb+48 : goto rvbd;\r
289 case H_Reverb+50 : goto rvbd;\r
290 case H_Reverb+52 : goto rvbd;\r
291 case H_Reverb+54 : goto rvbd;\r
292 case H_Reverb+56 : goto rvbd;\r
293 case H_Reverb+58 : goto rvbd;\r
294 case H_Reverb+60 : spu.rvb->IN_COEF_L=(short)val; break;\r
295 case H_Reverb+62 : spu.rvb->IN_COEF_R=(short)val; break;\r
ef79bbde 296 }\r
650adfd2 297 return;\r
298\r
299upd_irq:\r
3154bfab 300 if (spu.spuCtrl & CTRL_IRQ)\r
650adfd2 301 schedule_next_irq();\r
302 return;\r
ef79bbde 303\r
650adfd2 304rvbd:\r
05c7cec7 305 spu.rvb->dirty = 1; // recalculate on next update\r
ef79bbde
P		 306}\r
307\r
308////////////////////////////////////////////////////////////////////////\r
309// READ REGISTER: called by main emu\r
310////////////////////////////////////////////////////////////////////////\r
311\r
312unsigned short CALLBACK SPUreadRegister(unsigned long reg)\r
313{\r
4b22d950 314 const unsigned long r = reg & 0xffe;\r
ef79bbde 315 \r
ef79bbde
P		 316 if(r>=0x0c00 && r<0x0d80)\r
317 {\r
318 switch(r&0x0f)\r
319 {\r
320 case 12: // get adsr vol\r
321 {\r
322 const int ch=(r>>4)-0xc0;\r
3154bfab 323 if(spu.dwNewChannel&(1<<ch)) return 1; // we are started, but not processed? return 1\r
5aa94fa0 324 if((spu.dwChannelsAudible&(1<<ch)) && // same here... we haven't decoded one sample yet, so no envelope yet. return 1 as well\r
5514a050 325 !spu.s_chan[ch].ADSRX.EnvelopeVol)\r
ef79bbde 326 return 1;\r
5514a050 327 return (unsigned short)(spu.s_chan[ch].ADSRX.EnvelopeVol>>16);\r
ef79bbde
P		 328 }\r
329\r
330 case 14: // get loop address\r
331 {\r
332 const int ch=(r>>4)-0xc0;\r
5514a050 333 return (unsigned short)((spu.s_chan[ch].pLoop-spu.spuMemC)>>3);\r
ef79bbde
P		 334 }\r
335 }\r
336 }\r
4b22d950 337 else if (0x0e00 <= r && r < 0x0e60)\r
338 {\r
339 int ch = (r >> 2) & 0x1f;\r
340 int v = spu.s_chan[ch].iVolume[(r >> 1) & 1] << 1;\r
341 log_unhandled("c%02d r %cvol %04x\n", ch, (r & 2) ? 'r' : 'l', v);\r
342 return v;\r
343 }\r
ef79bbde
P		 344\r
345 switch(r)\r
346 {\r
347 case H_SPUctrl:\r
3154bfab 348 return spu.spuCtrl;\r
ef79bbde
P		 349\r
350 case H_SPUstat:\r
d056f51b 351 return (spu.spuStat & ~0x3F) | (spu.spuCtrl & 0x3F);\r
ef79bbde
P		 352 \r
353 case H_SPUaddr:\r
3154bfab 354 return (unsigned short)(spu.spuAddr>>3);\r
ef79bbde 355\r
3c7a8977 356 // this reportedly doesn't work on real hw\r
ef79bbde
P		 357 case H_SPUdata:\r
358 {\r
a4621d43 359 unsigned short s = LE16TOH(*(unsigned short *)(spu.spuMemC + spu.spuAddr));\r
5514a050 360 spu.spuAddr += 2;\r
361 spu.spuAddr &= 0x7fffe;\r
3c7a8977 362 //check_irq_io(spu.spuAddr);\r
ef79bbde
P		 363 return s;\r
364 }\r
365\r
ef79bbde
P		 366 //case H_SPUIsOn1:\r
367 // return IsSoundOn(0,16);\r
368\r
369 //case H_SPUIsOn2:\r
370 // return IsSoundOn(16,24);\r
371 \r
6c9db47c 372 case H_SPUMute1:\r
373 case H_SPUMute2:\r
374 log_unhandled("r isOn: %08lx\n", reg);\r
375 break;\r
906b1599 376\r
377 case 0x0dac:\r
378 case H_SPUirqAddr:\r
379 case H_CDLeft:\r
380 case H_CDRight:\r
381 case H_ExtLeft:\r
382 case H_ExtRight:\r
383 break;\r
384\r
385 default:\r
386 if (r >= 0xda0)\r
387 log_unhandled("spu r %08lx\n", reg);\r
388 break;\r
ef79bbde
P		 389 }\r
390\r
3154bfab 391 return spu.regArea[(r-0xc00)>>1];\r
ef79bbde
P		 392}\r
393 \r
394////////////////////////////////////////////////////////////////////////\r
395// SOUND ON register write\r
396////////////////////////////////////////////////////////////////////////\r
397\r
7e44d49d 398static void SoundOn(int start,int end,unsigned short val)\r
ef79bbde
P		 399{\r
400 int ch;\r
401\r
402 for(ch=start;ch<end;ch++,val>>=1) // loop channels\r
403 {\r
5fdcf5cd 404 if((val&1) && regAreaGetCh(ch, 6)) // mmm... start has to be set before key on !?!\r
ef79bbde 405 {\r
16f3ca66 406 spu.s_chan[ch].bIgnoreLoop = 0;\r
3154bfab 407 spu.dwNewChannel|=(1<<ch);\r
ef79bbde
P		 408 }\r
409 }\r
410}\r
411\r
412////////////////////////////////////////////////////////////////////////\r
413// SOUND OFF register write\r
414////////////////////////////////////////////////////////////////////////\r
415\r
7e44d49d 416static void SoundOff(int start,int end,unsigned short val)\r
ef79bbde
P		 417{\r
418 int ch;\r
419 for(ch=start;ch<end;ch++,val>>=1) // loop channels\r
420 {\r
9ad8abfa 421 if(val&1)\r
ef79bbde 422 {\r
5514a050 423 spu.s_chan[ch].ADSRX.State = ADSR_RELEASE;\r
b00afb77 424\r
425 // Jungle Book - Rhythm 'n Groove\r
426 // - turns off buzzing sound (loop hangs)\r
3154bfab 427 spu.dwNewChannel &= ~(1<<ch);\r
ef79bbde
P		 428 } \r
429 }\r
430}\r
431\r
432////////////////////////////////////////////////////////////////////////\r
433// FMOD register write\r
434////////////////////////////////////////////////////////////////////////\r
435\r
7e44d49d 436static void FModOn(int start,int end,unsigned short val)\r
ef79bbde
P		 437{\r
438 int ch;\r
439\r
440 for(ch=start;ch<end;ch++,val>>=1) // loop channels\r
441 {\r
442 if(val&1) // -> fmod on/off\r
443 {\r
444 if(ch>0) \r
445 {\r
5514a050 446 spu.s_chan[ch].bFMod=1; // --> sound channel\r
447 spu.s_chan[ch-1].bFMod=2; // --> freq channel\r
ef79bbde
P		 448 }\r
449 }\r
450 else\r
451 {\r
5514a050 452 spu.s_chan[ch].bFMod=0; // --> turn off fmod\r
453 if(ch>0&&spu.s_chan[ch-1].bFMod==2)\r
454 spu.s_chan[ch-1].bFMod=0;\r
ef79bbde
P		 455 }\r
456 }\r
457}\r
458\r
459////////////////////////////////////////////////////////////////////////\r
460// NOISE register write\r
461////////////////////////////////////////////////////////////////////////\r
462\r
7e44d49d 463static void NoiseOn(int start,int end,unsigned short val)\r
ef79bbde
P		 464{\r
465 int ch;\r
466\r
467 for(ch=start;ch<end;ch++,val>>=1) // loop channels\r
468 {\r
5514a050 469 spu.s_chan[ch].bNoise=val&1; // -> noise on/off\r
ef79bbde
P		 470 }\r
471}\r
472\r
473////////////////////////////////////////////////////////////////////////\r
474// LEFT VOLUME register write\r
475////////////////////////////////////////////////////////////////////////\r
476\r
477// please note: sweep and phase invert are wrong... but I've never seen\r
478// them used\r
479\r
7e44d49d 480static void SetVolumeL(unsigned char ch,short vol) // LEFT VOLUME\r
ef79bbde 481{\r
ef79bbde
P		 482 if(vol&0x8000) // sweep?\r
483 {\r
484 short sInc=1; // -> sweep up?\r
6c9db47c 485 log_unhandled("ch%d sweepl %04x\n", ch, vol);\r
ef79bbde
P		 486 if(vol&0x2000) sInc=-1; // -> or down?\r
487 if(vol&0x1000) vol^=0xffff; // -> mmm... phase inverted? have to investigate this\r
488 vol=((vol&0x7f)+1)/2; // -> sweep: 0..127 -> 0..64\r
489 vol+=vol/(2*sInc); // -> HACK: we don't sweep right now, so we just raise/lower the volume by the half!\r
490 vol*=128;\r
491 }\r
492 else // no sweep:\r
493 {\r
494 if(vol&0x4000) // -> mmm... phase inverted? have to investigate this\r
495 //vol^=0xffff;\r
496 vol=0x3fff-(vol&0x3fff);\r
497 }\r
498\r
499 vol&=0x3fff;\r
5514a050 500 spu.s_chan[ch].iLeftVolume=vol; // store volume\r
4b22d950 501 //spu.regArea[(0xe00-0xc00)/2 + ch*2 + 0] = vol << 1;\r
ef79bbde
P		 502}\r
503\r
504////////////////////////////////////////////////////////////////////////\r
505// RIGHT VOLUME register write\r
506////////////////////////////////////////////////////////////////////////\r
507\r
7e44d49d 508static void SetVolumeR(unsigned char ch,short vol) // RIGHT VOLUME\r
ef79bbde 509{\r
ef79bbde
P		 510 if(vol&0x8000) // comments... see above :)\r
511 {\r
512 short sInc=1;\r
6c9db47c 513 log_unhandled("ch%d sweepr %04x\n", ch, vol);\r
ef79bbde
P		 514 if(vol&0x2000) sInc=-1;\r
515 if(vol&0x1000) vol^=0xffff;\r
516 vol=((vol&0x7f)+1)/2; \r
517 vol+=vol/(2*sInc);\r
518 vol*=128;\r
519 }\r
520 else \r
521 {\r
522 if(vol&0x4000) //vol=vol^=0xffff;\r
523 vol=0x3fff-(vol&0x3fff);\r
524 }\r
525\r
526 vol&=0x3fff;\r
527\r
5514a050 528 spu.s_chan[ch].iRightVolume=vol;\r
4b22d950 529 //spu.regArea[(0xe00-0xc00)/2 + ch*2 + 1] = vol << 1;\r
ef79bbde
P		 530}\r
531\r
532////////////////////////////////////////////////////////////////////////\r
533// PITCH register write\r
534////////////////////////////////////////////////////////////////////////\r
535\r
7e44d49d 536static void SetPitch(int ch,unsigned short val) // SET PITCH\r
ef79bbde
P		 537{\r
538 int NP;\r
539 if(val>0x3fff) NP=0x3fff; // get pitch val\r
540 else NP=val;\r
541\r
f3fa20c2 542 spu.s_chan[ch].iRawPitch = NP;\r
543 spu.s_chan[ch].sinc = NP << 4;\r
544 spu.s_chan[ch].sinc_inv = 0;\r
53d4b74d 545 spu.s_chan[ch].bNewPitch = 1;\r
1d5d35bc 546\r
547 // don't mess spu.dwChannelsAudible as adsr runs independently\r
ef79bbde
P		 548}\r
549\r
550////////////////////////////////////////////////////////////////////////\r
551// REVERB register write\r
552////////////////////////////////////////////////////////////////////////\r
553\r
7e44d49d 554static void ReverbOn(int start,int end,unsigned short val)\r
ef79bbde
P		 555{\r
556 int ch;\r
557\r
558 for(ch=start;ch<end;ch++,val>>=1) // loop channels\r
559 {\r
5514a050 560 spu.s_chan[ch].bReverb=val&1; // -> reverb on/off\r
ef79bbde
P		 561 }\r
562}\r
ARM optimized PCSX fork